INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VDD
VPWR
I
UP
CSB
SCLK
I
DWN
SO
SI
RSTB
FSB
IN0
IN1
FSOB
CONF0
CONF1
R
DWN
I
DWN
V
DD
Failure
Detection
Internal
Regulator
V
REG
POR
Over/Undervoltage
Protections
Charge
Pump
Drain/Gate
Clamp
Selectable Slew Rate
Gate Driver
Selectable Overcurrent
Detection
Severe Short-circuit
Detection
Control
HS0
Logic
Short-circuit to
VPWR detec.
Overtemperature
Detect.
OpenLoad
Detect
HS0
I
UP
V
REG
Calibratable
Oscillator *
HS1
HS1
CLOCK
I
DWN
PWM
Module
*
Temperature
Feedback
Output
Current Sense
Analog MUX
Overtemperature
Prewarning
*blocks marked in grey have implemented
independently for each of both channels
GND
CSNS
SYNC
Figure 2. Internal Block Diagram
10XSD200
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
