MC56F825x/MC56F824x Family Configuration
1
MC56F825x/MC56F824x Family Configuration
Table 1. MC56F825x/MC56F824x Device Comparison
Feature
56F8245 56F8246 56F8247 56F8255 56F8256 56F8257
60
120
48
6
6
0
4
48
6
6
0
4
48
8
6
3
4
64
8
6
0
4
64
8
6
0
4
64
8
6
3
4
compares the MC56F825x/MC56F824x devices.
Operation Frequency (MHz)
High Speed Peripheral Clock (MHz)
Flash memory size (KB) with 1024 words per page
RAM size (KB)
Enhanced
High resolution NanoEdge PWM (520 ps res.)
Flex PWM
Enhanced Flex PWM with Input Capture
(eFlexPWM)
PWM Fault Inputs (from Crossbar Input)
12-bit ADC with x1, 2x, 4x Programmable Gain
Analog comparators (ACMP) each with integrated 5-bit DAC
12-bit DAC
Cyclic Redundancy Check (CRC)
Inter-Integrated Circuit (I
2
C) / SMBus
Queued Serial peripheral Interface (QSPI)
High speed Queued Serial Communications Interface (QSCI)
1
Controller Area Network (MSCAN)
High Speed 16-bit multi-purpose timers (TMR)
2
Computer operating properly (COP) watchdog timer
Integrated Power-On Reset and low voltage detection
Phase-locked loop (PLL)
8 MHz (400 kHz at standby mode) on-chip ROSC
Crystal/resonator oscillator
Crossbar
Input pins
Output pins
General purpose I/O (GPIO)
3
IEEE 1149.1 Joint Test Action Group (JTAG) interface
Enhanced on-chip emulator (EOnCE)
Operating temperature range
Package
1
2
3
2 x 4Ch 2 x 5Ch 2 x 8Ch 2 x 4Ch 2 x 5 Ch 2 x 8 Ch
3
1
Yes
2
1
2
0
8
Yes
Yes
Yes
Yes
Yes
6
2
35
6
2
39
6
6
54
Yes
Yes
-40 °C to 105 °C
44LQFP 48LQFP 64LQFP 44LQFP 48LQFP 64LQFP
6
2
35
6
2
39
6
6
54
1
Can be clocked by high speed peripheral clock up to 120 MHz
Can be clocked by high speed peripheral clock up to 120 MHz
Shared with other function pins
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Freescale Semiconductor
3
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
