Local Bus
describes the general timing parameters of the local bus interface of the device.
Table 39. Local Bus General Timing Parameters—PLL Bypass Mode
Parameter
Local bus cycle time
Input setup to local bus clock
Input hold from local bus clock
LALE output fall to LAD output transition (LATCH
hold time)
LALE output fall to LAD output transition (LATCH
hold time)
LALE output fall to LAD output transition (LATCH
hold time)
Local bus clock to output valid
Local bus clock to output high impedance for
LAD/LDP
1
Symbol
t
LBK
t
LBIVKH
t
LBIXKH
t
LBOTOT1
t
LBOTOT2
t
LBOTOT3
t
LBKHOV
t
LBKHOZ
Min
15
7.0
1.0
1.5
3.0
2.5
—
—
Max
—
—
—
—
—
—
3.0
4.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Note:
The symbols used for timing specifications herein follow the pattern of t
(First two letters of functional block)(signal)(state) (reference)(state)
for inputs and t
(First two letters of functional block)(reference)(state)(signal)(state)
for outputs. For example, t
LBIXKH1
symbolizes local bus
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
LBK
clock reference (K) goes high (H), in this case
for clock one(1). Also, t
LBKHOX
symbolizes local bus timing (LB) for the t
LBK
clock reference (K) to go high (H), with respect
to the output (O) going invalid (X) or output hold time.
2
All timings are in reference to falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or rising edge of
LCLK0 (for all other inputs).
3
All signals are measured from LBV /2 of the rising/falling edge of LCLK0 to 0.4
×
LBV
DD
DD
of the signal in question for 3.3-V
signaling levels.
4
Input timings are measured at the pin.
5
t
LBOTOT1
should be used when LBCR[AHD] is not set and the load on LALE output pin is at least 10pF less than the load on
LAD output pins.
6
t
LBOTOT2
should be used when LBCR[AHD] is set and the load on LALE output pin is at least 10pF less than the load on LAD
output pins.
7
t
LBOTOT3
should be used when LBCR[AHD] is set and the load on LALE output pin equals to the load on LAD output pins.
8
For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
provides the AC test load for the local bus.
Output
Z
0
= 50
Ω
OVDD/2
R
L
= 50
Ω
Figure 19. Local Bus AC Test Load
MPC8377E PowerQUICC
™
II Pro Processor Hardware Specifications, Rev. 2
36
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
