DDR SDRAM
6
DDR SDRAM
This section describes the DC and AC electrical specifications for the DDR SDRAM interface of the
MPC8541E.
6.1
DDR SDRAM DC Electrical Characteristics
provides the recommended operating conditions for the DDR SDRAM component(s) of the
MPC8541E.
Table 11. DDR SDRAM DC Electrical Characteristics
Parameter/Condition
I/O supply voltage
I/O reference voltage
I/O termination voltage
Input high voltage
Input low voltage
Output leakage current
Output high current (V
OUT
= 1.95 V)
Output low current (V
OUT
= 0.35 V)
MV
REF
input leakage current
Symbol
GV
DD
MV
REF
V
TT
V
IH
V
IL
I
OZ
I
OH
I
OL
I
VREF
Min
2.375
0.49
×
GV
DD
MV
REF
– 0.04
MV
REF
+ 0.18
–0.3
–10
–15.2
15.2
—
Max
2.625
0.51
×
GV
DD
MV
REF
+ 0.04
GV
DD
+ 0.3
MV
REF
– 0.18
10
—
—
5
Unit
V
V
V
V
V
μA
mA
mA
μA
4
Notes
1
2
3
Notes:
1. GV
DD
is expected to be within 50 mV of the DRAM GV
DD
at all times.
2. MV
REF
is expected to be equal to 0.5
×
GV
DD
, and to track GV
DD
DC variations as measured at the receiver. Peak-to-peak
noise on MV
REF
may not exceed ±2% of the DC value.
3. V
TT
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MV
REF
. This rail should track variations in the DC level of MV
REF
.
4. Output leakage is measured with all outputs disabled, 0 V
≤
V
OUT
≤
GV
DD
.
provides the DDR capacitance.
Table 12. DDR SDRAM Capacitance
Parameter/Condition
Input/output capacitance: DQ, DQS, MSYNC_IN
Delta input/output capacitance: DQ, DQS
Symbol
C
IO
C
DIO
Min
6
—
Max
8
0.5
Unit
pF
pF
Notes
1
1
Note:
1. This parameter is sampled. GV
DD
= 2.5 V ± 0.125 V, f = 1 MHz, T
A
= 25°C, V
OUT
= GV
DD
/2, V
OUT
(peak to peak) = 0.2 V.
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
15
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
