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MPC8541EVTAKE 参数 Datasheet PDF下载

MPC8541EVTAKE图片预览
型号: MPC8541EVTAKE
PDF下载: 下载PDF文件 查看货源
内容描述: PowerQUICC⑩ III集成通信处理器的硬件规格 [PowerQUICC⑩ III Integrated Communications Processor Hardware Specifications]
分类和应用: 外围集成电路通信时钟
文件页数/大小: 84 页 / 1239 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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Ethernet: Three-Speed, MII Management
7.2
DUART AC Electrical Specifications
Table 17. DUART AC Timing Specifications
Parameter
Minimum baud rate
Maximum baud rate
Oversample rate
Value
f
CCB_CLK
/ 1048576
f
CCB_CLK
/ 16
16
Unit
baud
baud
Notes
3
1, 3
2, 3
provides the AC timing parameters for the DUART interface of the MPC8541E.
Notes:
1. Actual attainable baud rate will be limited by the latency of interrupt processing.
2. The middle of a start bit is detected as the 8
th
sampled 0 after the 1-to-0 transition of the start bit.
Subsequent bit values are sampled each 16
th
sample.
3. Guaranteed by design.
8
Ethernet: Three-Speed, MII Management
This section provides the AC and DC electrical characteristics forthree-speed, 10/100/1000, and MII
management.
8.1
Three-Speed Ethernet Controller (TSEC)
(10/100/1000 Mbps)—GMII/MII/TBI/RGMII/RTBI Electrical
Characteristics
The electrical characteristics specified here apply to allGMII (gigabit media independent interface), the
MII (media independent interface), TBI (ten-bit interface), RGMII (reduced gigabit media independent
interface), and RTBI (reduced ten-bit interface) signals except MDIO (management data input/output) and
MDC (management data clock). The RGMII and RTBI interfaces are defined for 2.5 V, while the GMII
and TBI interfaces can be operated at 3.3 or 2.5 V. Whether theGMII, MII, or TBI interface is operated at
3.3 or 2.5 V, the timing is compliant with the IEEE 802.3 standard. The RGMII and RTBI interfaces follow
the Hewlett-Packard reduced pin-count interface for Gigabit Ethernet Physical Layer Device Specification
Version 1.2a (9/22/2000). The electrical characteristics for MDIO and MDC are specified in
8.1.1
TSEC DC Electrical Characteristics
All GMII, MII, TBI, RGMII, and RTBI drivers and receivers comply with the DC parametric attributes
specified in
and
The potential applied to the input of a GMII, MII, TBI, RGMII, or
RTBI receiver may exceed the potential of the receiver’s power supply (i.e., a GMII driver powered from
a 3.6-V supply driving V
OH
into a GMII receiver powered from a 2.5-V supply). Tolerance for dissimilar
GMII driver and receiver supply potentials is implicit in these specifications. The RGMII and RTBI signals
are based on a 2.5-V CMOS interface voltage as defined by JEDEC EIA/JESD8-5.
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4
20
Freescale Semiconductor