Package and Pin Listings
Table 43. MPC8555E Pinout Listing (continued)
Power
Notes
Signal
MSYNC_IN
Package Pin Number
Pin Type
Supply
M28
N28
I
GVDD
GVDD
22
22
MSYNC_OUT
O
Local Bus Controller Interface
LA[27]
U18
O
O
OVDD
OVDD
OVDD
5, 9
LA[28:31]
LAD[0:31]
T18, T19, T20, T21
5, 7, 9
AD26, AD27, AD28, AC26, AC27, AC28, AA22,
AA23, AA26, Y21, Y22, Y26, W20, W22, W26, V19,
T22, R24, R23, R22, R21, R18, P26, P25, P20, P19,
P18, N22, N23, N24, N25, N26
I/O
LALE
V21
O
O
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
5, 8, 9
9
LBCTL
V20
LCKE
U23
O
LCLK[0:2]
U27, U28, V18
O
LCS[0:4]
Y27, Y28, W27, W28, R27
O
LCS5/DMA_DREQ2
LCS6/DMA_DACK2
LCS7/DMA_DDONE2
LDP[0:3]
R28
I/O
O
1
1
1
P27
P28
O
AA27, AA28, T26, P21
I/O
O
LGPL0/LSDA10
LGPL1/LSDWE
LGPL2/LOE/LSDRAS
LGPL3/LSDCAS
U19
U22
V28
V27
V23
5, 9
5, 9
O
O
5, 8, 9
5, 9
O
LGPL4/LGTA/LUPWAIT/
LPBSE
I/O
21
LGPL5
V22
O
I
OVDD
OVDD
OVDD
OVDD
5, 9
LSYNC_IN
LSYNC_OUT
T27
T28
O
O
LWE[0:1]/LSDDQM[0:1]/
LBS[0:1]
AB28, AB27
1, 5, 9
1, 5, 9
LWE[2:3]/LSDDQM[2:3]/
LBS[2:3]
T23, P24
O
OVDD
DMA
DMA_DREQ[0:1]
DMA_DACK[0:1]
H5, G4
H6, G5
I
OVDD
OVDD
O
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
59
FREESCALE [ Freescale ]
