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GS1559-CBE2 参数 Datasheet PDF下载

GS1559-CBE2图片预览
型号: GS1559-CBE2
PDF下载: 下载PDF文件 查看货源
内容描述: GS1559 HD- LINX -TM II多速率解串器,带环通电缆驱动器 [GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路
文件页数/大小: 74 页 / 1142 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS1559 Data Sheet
4. Detailed Description
4.1 Functional Overview
The GS1559 is a multi-rate reclocking deserializer with an integrated serial digital
loop-through output. When used in conjunction with the multi-rate GS1574
Adaptive Cable Equalizer and the external GO1525 Voltage Controlled Oscillator,
a receive solution at 1.485Gb/s, 1.485/1.001Gb/s or 270Mb/s is realized.
The device has two basic modes of operation which determine precisely how
SMPTE or DVB-ASI compliant input data streams are reclocked and processed.
In master mode, (MASTER/SLAVE = HIGH), the GS1559 will automatically detect,
reclock, deserialize and process SD SMPTE 259M-C, HD SMPTE 292M, or
DVB-ASI input data.
In slave mode, (MASTER/SLAVE = LOW), the application layer must set external
device pins for the correct reception of either SMPTE or DVB-ASI data. Slave
mode also supports the reclocking and deserializing of data not conforming to
SMPTE or DVB-ASI streams.
The provided serial loop-through outputs may be selected as either buffered or
reclocked versions of the input signal and feature a high impedance mode, output
mute on loss of signal and adjustable signal swing.
In the digital signal processing core, several data processing functions are
implemented including error detection and correction and automatic video
standards detection. These features are all enabled by default, but may be
individually disabled via internal registers accessible through the GSPI host
interface.
Finally, the GS1559 contains a JTAG interface for boundary scan test
implementations.
4.2 Serial Digital Input
The GS1559 contains two current mode differential serial digital input buffers,
allowing the device to be connected to two SMPTE 259M-C or 292M compliant
input signals.
Both input buffers have internal 50Ω termination resistors which are connected to
ground via the TERM1 and TERM2 pins. The input common mode level is set by
internal biasing resistors such that the serial digital input signals must be AC
coupled into the device. Gennum recommends using a capacitor value of 4.7uF to
accommodate pathological signals.
The input buffers use a separate power supply of +1.8V DC supplied via the
BUFF_VDD and PDBUFF_GND pins.
30572 - 4
July 2005
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