IN1307
DC ELECTRICAL CHARACTERISTICS
(ТА = –40...+ 85С, VCC = 4.5 – 5.5 V )
Limit
min
–
Parameter
Symbol Mode
Unit
max
1
Input leakage current, (SCL only)
ILI
–
uА
uА
V
In / Out leakage current,
(SDA and SQW/OUT)
ILO
VOL
–
–
–
–
1
1)
Low level output voltage
VСС = 4.5 V
fSCL = 100 kHz
0.4
1500
Consumption current in the data
transfer mode
ICCA
ICCS
µА
Consumption current in the static
mode
VСС = 5 V and SDA,
SCL = 5 V
–
–
200
0.5
µА
Consumption current in the battery
mode
(SQW/OUT OFF., 32 kHz – ON)
VCC = 0 V,
VBAT = 3 V
IBAT1
µA
Consumption current in the battery
mode
(SQW/OUT – ON, 32 kHz – ON)
VCC = 0 V,
VBAT = 3 V
IBAT2
–
0.8
µA
Low level voltage is determined under the load current of 5 mА; VOL = GND under the capacitance load
AC ELECTRICAL CHARACTERISTICS
(ТА = –40...+ 85С, VCC = 4.5 – 5.5 V )
Limit
Parameter
Symbol
Mode
Unit
Min
Max
–
–
kHz
Cycle frequency SCL
fSCL
0
100
µs
µs
Time of the bus vacant status between the
statuses of STOP and START
tBUF
4.7
–
–
1)
tHD:STA
–
Hold time (repeated) of START status
4.0
4.7
4.0
µs
µs
µs
Duration of the low status of the cycle
pulse SCL
tLOW
–
–
–
–
–
–
Duration of the cycle pulse high status
SCL
tHIGH
tSU:STA
Pre-set time for the repeated status
START
4.7
0
2)
Data hold time
tHD:DAT
tSU:DAT
tR
–
–
–
–
–
–
–
–
–
µs
ns
ns
ns
us
pF
pF
pF
Data pre-set time
250
–
–
Rise time of signals SDA and SCL
Drop time of signals SDA and SCL
1000
300
–
tF
–
Pre-set time for the status
STOP
tSU:STO
CB
4.7
–
TotaL capacitance load per each bus line
IN / OUT capacitance
400
10
CI/O
СLX
10
12.5
Load capacitance of the quartz resonator
12.5
After this time interval the first time cycle signal is formed;
Device should internally ensure the hold time, at least, 300 nsec for the signal SDA (relative to VIHMIN of
signal SCL) in order to overlap the indeterminancy area of the fall signal of SCL.
maximum value tHD:DAT should be definite in that case, if the device does not increase duration of the low
status (tLOW) of signal SCL.
2013, December, Ver.04
3
IKSEMICON [ IK SEMICON CO., LTD ]
