IA186EM/IA188EM
Data Sheet
8-Bit/16-Bit Microcontrollers
February 25, 2011
LIST OF FIGURES
Figure 1. IA186EM TQFP Package Diagram...............................................................................16
Figure 2. IA188EM TQFP Package Diagram...............................................................................19
Figure 3. TQFP Package Dimensions...........................................................................................22
Figure 4. IA186EM PQFP Package Diagram...............................................................................23
Figure 5. IA188EM PQFP Package Diagram...............................................................................26
Figure 6. PQFP Package Dimensions ...........................................................................................29
Figure 7. Functional Block Diagram ............................................................................................44
Figure 8. Crystal Configuration....................................................................................................45
Figure 9. Organization of Clock ...................................................................................................46
Figure 10. DMA Unit....................................................................................................................54
Figure 11. Read Cycle.................................................................................................................106
Figure 12. Multiple Read Cycles ................................................................................................107
Figure 13. Write Cycle................................................................................................................109
Figure 14. Multiple Write Cycles ...............................................................................................110
Figure 15. PSRAM Read Cycle..................................................................................................112
Figure 16. PSRAM Write Cycle .................................................................................................114
Figure 17. PSRAM Refresh Cycle..............................................................................................116
Figure 18. Interrupt Acknowledge Cycle....................................................................................117
Figure 19. Software Halt Cycle ..................................................................................................119
Figure 20. Clock—Active Mode.................................................................................................120
Figure 21. Clock—Power-Save Mode........................................................................................120
Figure 22. srdy—Synchronous Ready........................................................................................121
Figure 23. ardy—Asynchronous Ready......................................................................................122
Figure 24. Peripherals .................................................................................................................122
Figure 25. Reset 1 .......................................................................................................................123
Figure 26. Reset 2 .......................................................................................................................123
Figure 27. Bus Hold Entering.....................................................................................................124
Figure 28. Bus Hold Leaving......................................................................................................124
Figure 29. Synchronous Serial Interface.....................................................................................125
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