82C54
Since the Control Word Register and the three Counters have
separate addresses (selected by the A1, A0 inputs), and each
Control Word specifies the Counter it applies to (SC0, SC1
bits), no special instruction sequence is required. Any
programming sequence that follows the conventions above is
acceptable.
CONTROL WORD FORMAT
A1, A0 = 11; CS = 0; RD = 1; WR = 0
D7
SC1
D6
SC0
D5
RW1
D4
RW0
D3
M2
D2
M1
D1
M0
D0
BCD
POSSIBLE PROGRAMMING SEQUENCE
A1
Control Word - Counter 0
LSB of Count - Counter 0
MSB of Count - Counter 0
Control Word - Counter 1
LSB of Count - Counter 1
MSB of Count - Counter 1
Control Word - Counter 2
LSB of Count - Counter 2
MSB of Count - Counter 2
Select Counter 0
Select Counter 1
Select Counter 2
Read-Back Command (See Read Operations)
RW - READ/WRITE
RW1 RW0
0
0
1
1
0
1
0
1
Counter Latch Command (See Read Operations)
Read/Write least significant byte only.
Read/Write most significant byte only.
Read/Write least significant byte first, then most
significant byte.
M - MODE
M2
0
0
X
X
1
1
M1
0
0
1
1
0
0
M0
0
1
0
1
0
1
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Control Word - Counter 2
Control Word - Counter 1
Control Word - Counter 0
LSB of Count - Counter 2
MSB of Count - Counter 2
LSB of Count - Counter 1
MSB of Count - Counter 1
LSB of Count - Counter 0
MSB of Count - Counter 0
Control Word - Counter 0
Control Word - Counter 1
Control Word - Counter 2
LSB of Count - Counter 2
LSB of Count - Counter 1
LSB of Count - Counter 0
MSB of Count - Counter 0
MSB of Count - Counter 1
MSB of Count - Counter 2
1
0
0
1
0
0
1
1
1
A0
1
0
0
1
1
1
1
0
0
SC - SELECT COUNTER
SC1
0
0
1
1
SC0
0
1
0
1
POSSIBLE PROGRAMMING SEQUENCE
A1
1
1
1
1
0
0
0
0
1
A0
1
1
1
0
1
0
0
1
0
POSSIBLE PROGRAMMING SEQUENCE
A1
1
1
1
1
1
0
0
0
0
A0
1
1
1
0
0
1
1
0
0
BCD - BINARY CODED DECIMAL
0
1
Binary Counter 16-bit
Binary Coded Decimal (BCD) Counter (4 Decades)
NOTE: Don’t Care bits (X) should be 0 to insure compatibility with
future products.
8
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