EL4585
Pin Descriptions
Pin NUMBER
1, 2, 16
3
4
5
6
7
PIN NAME
PROG A, B, C
OSC/VCO OUT
VDD (A)
OSC/VCO IN
VSS (A)
CHARGE PUMP
OUT
FUNCTION
Digital inputs to select ÷ N value for internal counter. See Table 1 for values.
Output of internal inverter/oscillator. Connect to external crystal or LC tank VCO circuit.
Analog positive supply for oscillator, PLL circuits.
Input from external VCO.
Analog ground for oscillator, PLL circuits.
Connect to loop filter. If the H
SYNC
phase is leading or H
SYNC
frequency > CLK ÷ 2N, current is pumped
into the filter capacitor to increase VCO frequency. If H
SYNC
phase is lagging or frequency < CLK ÷ 2N,
current is pumped out of the filter capacitor to decrease VCO frequency. During coast mode or when
locked, charge pump goes to a high impedance state.
Divide select input. When high, the internal divider is enabled and EXT DIV becomes a test pin, outputting
CLK ÷ 2N. When low, the internal divider is disabled and EXT DIV is an input from an external ÷N.
Three-state logic input. Low (< 1/3*V
CC
) = normal mode, Hi Z (or 1/3 to 2/3*V
CC
) = fast lock mode,
High (> 2/3*V
CC
) = coast mode.
Horizontal sync pulse (CMOS level) input.
Positive supply for digital, I/O circuits.
Lock detect output. Low level when PLL is locked. Pulses high when out of lock.
External divide input when DIV SEL is low, internal ÷ 2N output when DIV SEL is high.
Ground for digital, I/O circuits.
Buffered output of the VCO.
8
9
10
11
12
13
14
15
DIV SELECT
COAST
HSYNC IN
VDD (D)
LOCK DET
EXT DIV
VSS (D)
CLK OUT
TABLE 1. VCO DIVISORS
PROG A (PIN 16)
0
0
0
0
1
1
1
1
PROG B (PIN 1)
0
0
1
1
0
0
1
1
PROG C (PIN 2)
0
1
0
1
0
1
0
1
DIV VALUE (N)
1702
1728
1888
2270
1364
1716
1560
1820
4
FN7175.3
July 1, 2005
INTERSIL [ INTERSIL CORPORATION ]
