IRF5210PbF
20
16
12
8
6000
I
= -21A
V
C
C
C
= 0V,
f = 1MHz
D
GS
iss
rss
oss
= C + C
,
C
SHORTED
V
= -80V
= -50V
= -20V
gs
gd
gd
ds
DS
= C
V
DS
5000
4000
3000
2000
1000
0
= C + C
ds
gd
V
C
C
iss
DS
oss
C
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
200
A
0
40
80
120
160
1
10
100
-V , Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10µs
T = 175°C
J
100µs
T = 25°C
J
1ms
10ms
T
= 25°C
= 175°C
C
T
J
Single Pulse
V
= 0V
GS
A
1
1
A
1000
0.4
0.8
1.2
1.6
2.0
2.4
1
10
100
-V , Drain-to-Source Voltage (V)
-V , Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
INFINEON [ Infineon ]
