CMOS, 330 MHz
Triple 10-Bit High Speed Video DAC
49
50
51
VSSA
RSET
Ground of VDDA.
Voltage Reference Input for DACs or Voltage Reference Output.
Compensation Pin. This is a compensation pin for the internal
reference amplifier. A 0.1uF ceramic capacitor must be connected
between COMP and VDDA.
COMP
52
VDDA
Analog power supply (1.8V) for Voltage reference circuit.
Red, Green, and Blue Current Outputs. These high impedance current
sources are capable of directly driving a doubly terminated 75
coaxial cable. All three current outputs should have similar output
loads whether or not they are all being used.
Differential Red, Green, and Blue Current Output. These RGB video
outputs are specified to directly drive a doubly terminated 75 load. If
the complementary outputs are not required, these outputs should be
tied to ground.
53,56,59 IORP,
IOGP,
IOBP
54,57,60 IORN,
IOGN,
IOBN
55,58,61 VDDC
Analog power supply (1.8V) for three DACs.
Ground of VDDC.
62
VSSC
VSSD
VDDD
NC
63
Ground of VDDD.
64
Digital power supply (1.8V) for logic circuit.
1,2,13,
15, 16
Reserved.
NOTES
1. IORP, IOGP, and IOBP vs. BW0-BW1 (pulse output)
IORP, IOGP, and IOBP
BW[1:0]=11
BW[1:0]=10
BW[1:0]=01
BW[1:0]=00
2. When EN_DET is high and an output driver is active, the continuing presence
of the load is verified by comparing the dc level at the output to an internal
reference. If the load is removed then the voltage on the output pin (REDP,
GREENP or BLUEP) will become twice as high for standard termination, or
even higher for active termination.
6
ITE [ ITE TECH.INC. ]
