±15kV ESD-Protected, Quad,
Low-Voltage, SPST Analog Switches
Power-Supply Considerations
Overview
The MAX4551/MAX4552/MAX4553 construction is typi-
cal of most CMOS analog switches. They have three
supply pins: V+, V-, and GND. V+ and V- are used to
drive the internal CMOS switches, and they set the lim-
its of the analog voltage on any switch. Reverse ESD-
protection diodes are internally connected between
each analog-signal pin and both V+ and V-. If any ana-
log signal exceeds V+ or V-, one of these diodes con-
ducts. During normal operation these reverse-biased
ESD diodes leak, forming the only current drawn from
V+ or V-.
Virtually all the analog leakage current is through the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by
either V+ or V- and the analog signal. This means their
leakages vary as the signal varies. The
difference
in the
two diode leakages from the signal path to the V+ and
V- pins constitutes the analog-signal-path leakage cur-
rent. All analog leakage current flows to the supply ter-
minals, not to the other switch terminal. This explains
how both sides of a given switch can show leakage
currents of the same or opposite polarity.
The analog signal paths consist of an N-channel and P-
channel MOSFET with their sources and drains paral-
leled, and their gates driven out of phase to V+ and V-
by the logic-level translators.
V+ and GND power the internal logic and logic-level
translators, and set the input logic thresholds. The
logic-level translators convert the logic levels to
switched V+ and V- signals, to drive the gates of the
analog switches. This drive signal is the only connec-
tion between the logic supplies and the analog sup-
plies. V+ and V- have ESD-protection diodes to GND.
The logic-level inputs and output have ESD protection
to V+ and to GND.
Increasing V- has no effect on the logic-level thresh-
olds, but it does increase the drive to the P-channel
switches, reducing their on-resistance. V- also sets the
negative limit of the analog signal voltage.
The logic-level thresholds are CMOS/TTL compatible
when V+ = +5V. The threshold increases slightly as V+
is raised, and when V+ reaches +12V, the level thresh-
old is about 3.1V. This is above the TTL output high-
level minimum of 2.8V, but still compatible with CMOS
outputs.
Bipolar Supplies
The MAX4551/MAX4552/MAX4553 operate with bipolar
supplies between ±2V and ±6V. The V+ and V- sup-
plies need not be symmetrical, but their sum cannot
exceed the absolute maximum rating of 13.0V.
Do not
connect the MAX4551/MAX4552/MAX4553 V+ to +3V,
and then connect the logic-level-input pins to TTL
logic-level signals. TTL logic-level outputs in excess
of the absolute maximum ratings can damage the
part and/or external circuits.
Caution:
The absolute maximum V+ to V- differential
voltage is 13.0V. Typical ±6V or 12V supplies with
±10% tolerances can be as high as 13.2V. This voltage
can damage the MAX4551/MAX4552/MAX4553. Even
±5% tolerance supplies may have overshoot or noise
spikes that exceed 13.0V.
Single Supply
The MAX4551/MAX4552/MAX4553 operate from a
single supply between +2V and +12V when V- is con-
nected to GND. All of the bipolar precautions must be
observed.
MAX4551/MAX4552/MAX4553
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat up
to 50MHz (see
Typical Operating Characteristics
).
Above 20MHz, the on-response has several minor
peaks that are highly layout-dependent. The problem
with high-frequency operation is not turning the switch
on, but turning it off. The off-state switch acts like a
capacitor and passes higher frequencies with less
attenuation. At 10MHz, off-isolation is about -52dB in
50Ω systems, becoming worse (approximately 20dB
per decade) as frequency increases. Higher circuit
impedances also make off-isolation worse. Adjacent
channel attenuation is about 3dB above that of a bare
IC socket, and is due entirely to capacitive coupling.
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