CMOS, Quad, Serial-Interface
8-Bit DAC
Using an AC Reference
In applications where V
REF
has AC signal components,
the MAX500 has multiplying capability within the limits
of the V
REF
input range specifications. Figure 11 shows
a technique for applying a sine-wave signal to the refer-
ence input, where the AC signal is biased up before
being applied to V
REF
. Output distortion is typically less
than 0.1% with input frequencies up to 50kHz, and the
typical -3dB frequency is 700kHz. Note that V
REF
must
never be more negative than AGND.
MAX500
+15V
15k
AC
REFERENCE
INPUT
10k
V
OUT
B 1 V
OUT
B
-4V
DAC B
4
V
REF
A/B
14
V
DD
+4V
Generating V
SS
The performance of the MAX500 is specified for both
dual and single-supply (V
SS
= 0V) operation. When the
improved performance of dual-supply operation is
desired, but only a single supply is available, a -5V V
SS
supply can be generated using an ICL7660 in one of
the circuits of Figure 12.
V
SS
3
-5V (OR GND)
DIGITAL INPUTS NOT SHOWN
AGND
5
MAX500
DGND
6
Figure 11. AC Reference Input Circuit
Digital Interface Applications
Figures 13 through 16 show examples of interfacing the
MAX500 to most popular microprocessors.
12V to 15V
10k
2N2222
2
CAP+
8
6V
ZENER
10k
10µF
3
GND
V+
10µF
4
CAP-
+5V
LOGIC
SUPPLY
8
2
CAP+
V+
10µF
4
CAP-
ICL7660
V
OUT
5
-5V
V
SS
OUT
10µF
3
ICL7660
V
OUT
5
GND
-5V
V
SS
OUT
10µF
Figure 12. Generating -5V for V
SS
80C51
P1.0
P1.1
P1.2
P1.3
. . . . . . .
SCL
SDA
A15
MAX500
SRO
V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
V
REF
A/B
V
REF
C
V
REF
D
A0
ADDRESS BUS
A1
EN ADDRESS
CODE
A0
B/A
Z8420
C/D
B0
CE
B1
RD
B2
INT
B3
. .
D7
D0
SCL
MAX500
SDA
LDAC
LOAD*
Z80
I/O REQ
WR
INT
LDAC
LOAD*
D7
D0
DATA BUS
* CONNECT LOAD TO P1.3 FOR 3-WIRE MODE OR
CONNECT LOAD TO V
DD
FOR 2-WIRE MODE
* CONNECT LOAD TO P1.3 FOR 3-WIRE MODE OR
CONNECT LOAD TO V
DD
FOR 2-WIRE MODE
Figure 13. 80C51 Interface
Figure 14. Z-80 with Z8420 PIO Interface
11
______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
