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48SD1616RPFE 参数 Datasheet PDF下载

48SD1616RPFE图片预览
型号: 48SD1616RPFE
PDF下载: 下载PDF文件 查看货源
内容描述: 256 MB SDRAM的4梅格X 16位x 4银行 [256 Mb SDRAM 4-Meg X 16-Bit X 4-Banks]
分类和应用: 动态存储器
文件页数/大小: 42 页 / 595 K
品牌: MAXWELL [ MAXWELL TECHNOLOGIES ]
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48SD1616  
256Mb (4-Meg X 16-Bit X 4-Banks) SDRAM  
CKE Truth Table  
CURRENT STATE  
COMMAND  
N-1  
N
CS  
RAS  
CAS  
WE  
ADDRESS  
Active  
Clock suspended mode entry  
Clock Suspend  
H
L
L
H
H
H
H
L
L
L
L
L
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Any  
Clock Suspend  
Clock Suspend mode exit  
Auto-refresh command (REF)  
Self-refresh entry (SELF)  
H
H
L
x
x
x
x
Idle  
Idle  
Idle  
L
L
L
H
x
L
L
H
x
H
H
H
x
L
L
L
Power down entry  
L
HL  
L
Self Refresh  
Power down  
Self Refresh exit (SELFX)  
H
H
H
H
H
x
H
H
x
H
H
x
L
Power down exit  
H
Note: H:V L:V x V or V  
IL  
IH  
IL  
IH  
Clock suspend mode entry: The SDRAM enters clock suspend mode from active mode by setting CKE to  
Low. If a command is input in the clock suspend mode entry cycle, the command is valid. The clock suspend  
mode change depending on the current status (1 clock before) as described below.  
ACTIVE clock suspend: This suspend mode ignores inputs after the next clock by internally maintaining  
the bank active status.  
READ suspend and READ with Auto-precharge suspend: The data being output is held ( and continues  
to be output).  
WRITE suspend and WRIT with Auto-precharge suspended: In this mode, external signals are not  
accepted. However, the internal state is held.  
Clock suspend: During clock suspend mode, keep the CKE to Low.  
Clock suspend mode exit: The SDRAM exits from clock suspend mode by setting CKE to High during the  
clock suspend state.  
IDLE: In this state, all banks are not selected, and have completed precharge operation.  
Auto-refresh command (REF): When this command is input from the IDLE state, the SDRAM starts auto-  
refresh operation. (The auto-refresh is the same as the CBR refresh of conventional DRAMs.) During the  
auto-refresh operation, refresh address and bank select address are generated inside the SDRAM. For  
every auto-refresh cycle, the internal address counter is updated. Accordingly, 8192 cycles are required to  
refresh the entire memory contents. Before executing the auto-refresh command, all the banks must be in  
01.07.05 REV 4  
All data sheets are subject to change without notice 11  
©2005 Maxwell Technologies  
All rights reserved.