256Mb (4-Meg X 16-Bit X 4-Banks) SDRAM
48SD1616
Command Operation
Command Truth Table
The SDRAM recognizes the following commands specified by the CS, RAS, CAS, WE and address pins:
C
OMMAND
Ignore command
No Operation
Column Address and
Read command
Read with auto-pre-
charge
Column Address and
write command
Write with auto-pre-
charge
Row address strobe
and bank active
Precharge select
bank
Precharge all banks
Refresh
Mode register set
S
YMBOL
DESL
NOP
READ
READ A
WRIT
WRIT A
ACTV
PRE
PALL
REF/SELF
MRS
N
-1
N
CS
H
L
L
L
L
L
L
L
L
L
L
RAS
x
H
H
H
H
H
L
L
L
L
L
CAS
x
H
L
L
L
L
H
H
H
L
L
WE
x
H
H
H
L
L
H
L
L
H
L
BA0/
BA1
x
x
V
V
V
V
V
V
x
x
V
A10
x
x
L
H
L
H
V
L
H
x
V
A0
TO
A12
x
x
V
V
V
V
V
x
x
x
V
H
H
H
H
H
H
H
H
H
H
H
x
x
x
x
x
x
x
x
x
L
x
Memory
Note: H: V
IH
L: V
IL
x V
IH
or V
IL
V: Valid address input
Ignore command (DESL):
When this command is set (CS = High), the SDRAM ignores command input at
the clock. However, the internal status is held.
No Operation (NOP):
This command is not an execution command. However, the internal operations
continue.
Column address strobe and read command (READ):
This command starts a read operation. In addition,
the start address of a burst read is determined by the column address (AY0 to AY8) and the bank select
address (BS). After the read operation, the output buffer becomes High-Z.
01.07.05 REV 4
All data sheets are subject to change without notice
8
©2005 Maxwell Technologies
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
