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MX25L4006EPI-12G 参数 Datasheet PDF下载

MX25L4006EPI-12G图片预览
型号: MX25L4006EPI-12G
PDF下载: 下载PDF文件 查看货源
内容描述: 串行外设接口兼容--mode 0和模式3 [Serial Peripheral Interface compatible --Mode 0 and Mode 3]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 52 页 / 1532 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
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MX25L4006E
COMMAND DESCRIPTION
(1) Write Enable (WREN)
The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP, SE,
BE, CE, and WRSR, which are intended to change the device content, should be set every time after the WREN in-
struction setting the WEL bit.
The sequence is shown as
(2) Write Disable (WRDI)
The Write Disable (WRDI) instruction is for resetting Write Enable Latch (WEL) bit.
The sequence is shown as
The WEL bit is reset by following situations:
- Power-up
- Write Disable (WRDI) instruction completion
- Write Status Register (WRSR) instruction completion
- Page Program (PP) instruction completion
- Sector Erase (SE) instruction completion
- Block Erase (BE) instruction completion
- Chip Erase (CE) instruction completion
P/N: PM1576
12
REV. 1.3, FEB. 10, 2012