1Gb : x4, x8, x16 DDR3 SDRAM
Sp e e d Bin Ta b le s
t
Fig u re 36: No m in a l Sle w Ra t e fo r IH (Co m m a n d a n d Ad d re ss – Clo ck)
t
t
IS
IH
t
t
IH
IS
CK
CK#
DQS#
DQS
VDDQ
VIH(AC) MIN
VIH(DC) MIN
Nominal
slew rate
DC to VREF
region
VREF(DC)
Nominal
slew rate
DC to VREF
region
VIL(DC) MAX
VIL(AC) MAX
VSS
ΔTF
ΔTR
VREF(DC) - VIL(DC) MAX
ΔTR
VIH(DC) MIN - VREF(DC)
ΔTF
Hold slew rate
rising signal
Hold slew rate
falling signal
=
=
Notes: 1. Both the clock and the strobe are drawn on different time scales.
PDF: 09005aef826aa906/Source: 09005aef82a357c3
1Gb_DDR3_3.fm - Rev. D 8/1/08 EN
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©2006 Micron Technology, Inc. All rights reserved.
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