欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML6510CQ-80 参数 Datasheet PDF下载

ML6510CQ-80图片预览
型号: ML6510CQ-80
PDF下载: 下载PDF文件 查看货源
内容描述: 系列可编程自适应时钟管理器( PACMan⑩ ) [Series Programmable Adaptive Clock Manager (PACMan⑩)]
分类和应用: 时钟
文件页数/大小: 18 页 / 241 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
 浏览型号ML6510CQ-80的Datasheet PDF文件第1页浏览型号ML6510CQ-80的Datasheet PDF文件第2页浏览型号ML6510CQ-80的Datasheet PDF文件第3页浏览型号ML6510CQ-80的Datasheet PDF文件第5页浏览型号ML6510CQ-80的Datasheet PDF文件第6页浏览型号ML6510CQ-80的Datasheet PDF文件第7页浏览型号ML6510CQ-80的Datasheet PDF文件第8页浏览型号ML6510CQ-80的Datasheet PDF文件第9页  
ML6510  
ABSOLUTE MAXIMUM RATINGS  
Junction Temperature .............................................. 150°C  
Storage Temperature................................ –65°C to 150°C  
VCC Supply Voltage Range ............................ –0.3V to 6V  
Input Voltage Range .................................... –0.3V to VCC  
Output Current  
Thermal Resistance (θ )....................................... 54°C/W  
JA  
CLK[0–7] ........................................................ 70mA  
All other outputs............................................. 10mA  
ELECTRICAL CHARACTERISTICS  
The following specifications apply over the recommended operating conditions of DVCC = AVCC = 5V ± 5% and ambient  
temperature between 0°C and 70°C. Loading conditions are specified individually (Note 1)  
SYMBOL  
SUPPLY  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
DVCCXX Supply Current for each pair  
of clock outputs  
fCLKX = 0  
50  
40  
µA  
CL= 20pF, ZO = 50Ω  
60  
mA  
fOUT = 80MHz  
IAVCC1  
IAVCC2  
IAVCC3  
Static supply current, AVCC1 pin  
Static supply current, AVCC2 pin  
Static supply current, AVCC3 pin  
100  
35  
1
120  
40  
2
mA  
mA  
mA  
LOW FREQUENCY INPUTS AND OUTPUTS (ROMMSB, MDOUT, MDIN, MCLK, RESET, LOCK)  
VIH  
VIL  
High level input voltage  
Low level input voltage  
DVCC – 0.5  
V
V
V
DGND + 0.5  
DGND + 0.5  
VOH  
High level output voltage,  
MCLK and MDIN  
IOH = –100 µA  
IOL = +200 µA  
DVCC – 0.5  
VOL  
VOH  
VOL  
Low level output voltage,  
MCLK and MDIN  
V
High level output voltage,  
LOCK output  
IOH = –100 µA  
IOH = –10 µA  
2.4  
DVCC – 0.5  
V
V
Low level output voltage,  
LOCK output  
IOL = +1 mA  
0.4  
10  
V
IIN  
Static input current  
Input capacitance  
µA  
CIN  
5
pF  
HIGH FREQUENCY INPUTS AND OUTPUTS (CLKINH, CLKINL, FB[0-7], CLK[0-7])  
VIH  
High level input voltage  
CS = 0 (TTL Input Clock)  
CS = 1 (PECL Input Clock)  
CS = 0 (TTL Input Clock)  
CS = 1 (PECL Input Clock)  
CS = 1 (PECL Input Clock)  
2.0  
V
V
V
V
V
AVCC – 1.165  
AVCC – 0.88  
0.8  
VIL  
Low level input voltage  
AVCC – 1.810  
2.0  
AVCC – 1.475  
AVCC – 0.4  
VICM  
Common mode input voltage  
range for PECL reference clocks  
IIH  
High level input current  
Low level input current  
High level output voltage  
Low level output voltage  
VIH = 2.4V  
100  
µA  
µA  
V
IIL  
VIL = 0.4V  
–400  
2.4  
VOH  
VOL  
IOH = –60mA  
IOL = +60mA  
0.4  
V
4