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24LC32A-I/SN 参数 Datasheet PDF下载

24LC32A-I/SN图片预览
型号: 24LC32A-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 32KIC串行EEPROM [32KIC Serial EEPROM]
分类和应用: 存储内存集成电路光电二极管PC可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 26 页 / 350 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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24AA32A/24LC32A
3.6
Device Addressing
FIGURE 3-2:
CONTROL BYTE FORMAT
Read/Write Bit
Chip Select
Bits
0
A2 A1 A0 R/W ACK
A control byte is the first byte received following the
Start condition from the master device (Figure 3-2).
The control byte consists of a four-bit control code. For
the 24XX32A, this is set as ‘1010’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
bits allow the use of up to eight 24XX32A devices on
the same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1, and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’, a read operation is
selected. When set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 3-3). Because
only A11 to A0 are used, the upper four address bits are
don’t care bits. The upper address bits are transferred
first, followed by the less significant bits.
Following the Start condition, the 24XX32A monitors
the SDA bus checking the device type identifier being
transmitted and, upon receiving a ‘1010’ code and
appropriate device select bits, the slave device outputs
an Acknowledge signal on the SDA line. Depending on
the state of the R/W bit, the 24XX32A will select a read
or write operation.
Control Code
S
1
0
1
Slave Address
Start Bit
Acknowledge Bit
3.7
Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 256K bits by
adding up to eight 24XX32A's on the same bus. In this
case, software can use A0 of the control byte as
address bit A12, A1 as address bit A13, and A2 as
address bit A14. It is not possible to sequentially read
across device boundaries.
FIGURE 3-3:
ADDRESS SEQUENCE BIT ASSIGNMENTS
ADDRESS HIGH BYTE
ADDRESS LOW BYTE
CONTROL BYTE
1
0
1
0
A
2
A
1
A R/W
0
X
X
X
A A
X 11 10 A A
9 8
A
7
A
0
CONTROL
CODE
CHIP
SELECT
BITS
X = Don’t Care Bit
DS21713D-page 6
2003 Microchip Technology Inc.