MCP3002
5.0
5.1
SERIAL COMMUNICATIONS
Overview
Communication with the MCP3002 is done using a
standard SPI-compatible serial interface. Initiating
communication with the device is done by bringing the
CS line low. See Figure 5-1. If the device was powered
up with the CS pin low, it must be brought high and
back low to initiate communication. The first clock
received with CS low and D
IN
high will constitute a start
bit. The SGL/DIFF bit and the ODD/SIGN bit follow the
start bit and are used to select the input channel config-
uration. The SGL/DIFF is used to select single ended
or psuedo-differential mode. The ODD/SIGN bit selects
which channel is used in single ended mode, and is
used to determine polarity in psuedo-differential mode.
Following the ODD/SIGN bit, the MSBF bit is transmit-
ted to and is used to enable the LSB first format for the
device. If the MSBF bit is high, then the data will come
from the device in MSB first format and any further
clocks with CS low, will cause the device to output
zeros. If the MSBF bit is low, then the device will output
the converted word LSB first
after
the word has been
transmitted in the MSB first format. Table 5-1 shows the
configuration bits for the MCP3002. The device will
begin to sample the analog input on the second rising
edge of the clock, after the start bit has been received.
The sample period will end on the falling edge of the
third clock following the start bit.
On the falling edge of the clock for the MSBF bit, the
device will output a low null bit. The next sequential 10
clocks will output the result of the conversion with MSB
first as shown in Figure 5-1. Data is always output from
the device on the falling edge of the clock. If all 10 data
bits have been transmitted and the device continues to
receive clocks while the CS is held low (and the MSBF
bit is high), the device will output the conversion result
LSB first as shown in Figure 5-2. If more clocks are pro-
vided to the device while CS is still low (after the LSB
first data has been transmitted), the device will clock
out zeros indefinitely.
If necessary, it is possible to bring CS low and clock in
leading zeros on the D
IN
line before the start bit. This is
often done when dealing with microcontroller-based
SPI ports that must send 8 bits at a time. Refer to
devices with hardware SPI ports.
If it is desired, the CS can be raised to end the conver-
sion period at any time during the transmission. Faster
conversion rates can be obtained by using this tech-
nique if not all the bits are captured before starting a
new cycle. Some system designers use this method by
capturing only the highest order 8 bits and ‘throwing
away’ the lower 2 bits.
TABLE 5-1:
Configuration Bits for the MCP3002.
CONFIG
BITS
SGL/
DIFF
SINGLE
ENDED MODE
PSEUDO-
DIFFERENTIAL
MODE
ODD/
SIGN
CHANNEL
SELECTION
0
1
GND
1
1
0
0
0
1
0
1
+
+
IN+
IN-
IN-
IN+
-
-
©
2007 Microchip Technology Inc.
DS21294C-page 13
MICROCHIP [ MICROCHIP TECHNOLOGY ]
