MCP3002
tCYC
tCYC
tCSH
CS
tSUCS
CLK
DIN
ODD/
SIGN
Don’t Care
HI-Z
HI-Z
Null
Bit
DOUT
B9 B8 B7 B6 B5 B4 B3 B2 B1 B0*
tSAMPLE
tCONV
tDATA**
* After completing the data transfer, if further clocks are applied with CS low, the A/D Converter will output zeros indefinitely. See
Figure 5-2 for details on obtaining LSB first data.
** tDATA: during this time, the bias current and the comparator powers down while the reference input becomes a high impedance
node.
FIGURE 5-1: Communication with the MCP3002 using MSB first format only.
tCYC
tCSH
CS
tSUCS
Power Down
CLK
Don’t Care
DIN
HI-Z
HI-Z
Null
Bit
B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 B1 B2 B3 B4 B5 B6 B7* B8 B9
DOUT
(MSB)
tSAMPLE
tDATA **
tCONV
* After completing the data transfer, if further clocks are applied with CS low, the A/D Converter will output zeros indefinitely.
** tDATA: During this time, the bias circuit and the comparator powers down while the reference input becomes a high impedance
node, leaving the CLK running to clock out LSB first data or zeroes.
FIGURE 5-2: Communication with MCP3002 using LSB first format.
DS21294C-page 14
© 2007 Microchip Technology Inc.
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