MCP433X/435X
V
IH
CS
70
SCK
83
71
80
SDO
MSb
75, 76
SDI
73
MSb IN
74
BIT6 - - - -1
LSb IN
79
BIT6 - - - - - -1
78
LSb
77
72
V
IHH
V
IL
84
V
IH
FIGURE 1-2:
TABLE 1-2:
#
SPI Timing Waveform (Mode = 11).
SPI REQUIREMENTS (MODE =
11
)
Characteristic
Symbol
F
SCK
TcsA2scH
TscH
TscL
T
DI
V2scH
TscH2
DI
L
TcsH2
DO
Z
TscL2
DO
V
TscH2csI
TcsA2csI
Min
—
—
60
45
500
45
500
10
20
20
—
—
100
1
50
Max Units
10
1
—
—
—
—
—
—
—
—
50
70
170
—
—
Conditions
MHz V
DD
= 2.7V to 5.5V
MHz V
DD
= 1.8V to 2.7V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
V
DD
= 2.7V to 5.5V
V
DD
= 1.8V to 2.7V
V
DD
= 2.7V to 5.5V
V
DD
= 1.8V to 2.7V
V
DD
= 2.7V to 5.5V
V
DD
= 1.8V to 2.7V
V
DD
= 2.7V to 5.5V
V
DD
= 1.8V to 2.7V
V
DD
= 2.7V to 5.5V
V
DD
= 1.8V to 2.7V
SCK Input Frequency
70
71
72
73
74
77
80
83
84
CS Active (V
IL
or V
IHH
) to SCK input
SCK input high time
SCK input low time
Setup time of SDI input to SCK edge
Hold time of SDI input from SCK edge
CS Inactive (V
IH
) to SDO output high-impedance
SDO data output valid after SCK edge
CS Inactive (V
IH
) after SCK edge
Hold time of CS Inactive (V
IH
) to
CS Active (V
IL
or V
IHH
)
This specification by design.
Note 1:
2010 Microchip Technology Inc.
DS22242A-page 13
MICROCHIP [ MICROCHIP TECHNOLOGY ]
