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MCP6273T-E/MS 参数 Datasheet PDF下载

MCP6273T-E/MS图片预览
型号: MCP6273T-E/MS
PDF下载: 下载PDF文件 查看货源
内容描述: 170 μA , 2 MHz的轨至轨运算放大器 [170 レA, 2 MHz Rail-to-Rail Op Amp]
分类和应用: 运算放大器放大器电路光电二极管
文件页数/大小: 34 页 / 1242 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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MCP6271/1R/2/3/4/5
1.0
ELECTRICAL
CHARACTERISTICS
† Notice:
Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
††
See
Absolute Maximum Ratings †
V
DD
– V
SS
........................................................................7.0V
Current at Analog Input Pins (V
IN
+ and V
IN
–) ...............±2 mA
Analog Inputs (V
IN
+ and V
IN
–) †† .. V
SS
– 1.0V to V
DD
+ 1.0V
All other Inputs and Outputs .......... V
SS
– 0.3V to V
DD
+ 0.3V
Difference Input Voltage ...................................... |V
DD
– V
SS
|
Output Short Circuit Current .................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature....................................–65°C to +150°C
Junction Temperature (T
J
) . .........................................+150°C
ESD Protection On All Pins (HBM/MM)
................ ≥
4 kV/400V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.0V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2,
V
OUT
V
DD
/2, R
L
= 10 kΩ to V
DD
/2 and CS is tied low.
Parameters
Input Offset (Note 1)
Input Offset Voltage
Input Offset Voltage
(Extended Temperature)
Input Offset Temperature Drift
Power Supply Rejection Ratio
Input Bias Current and Impedance
Input Bias Current
At Temperature
At Temperature
Input Offset Current
Common Mode Input Impedance
Differential Input Impedance
Common Mode (Note 4)
Common Mode Input Voltage Range
Common Mode Rejection Ratio
Common Mode Rejection Ratio
Open-Loop Gain
DC Open-Loop Gain (Large Signal)
Note 1:
2:
3:
4:
A
OL
90
110
dB
V
OUT
= 0.2V to V
DD
– 0.2V,
V
CM
= V
SS
V
CMR
V
CMR
CMRR
CMRR
V
SS
0.15
V
SS
0.30
70
65
85
80
V
DD
+ 0.15
V
DD
+ 0.30
V
V
dB
dB
V
DD
= 2.0V
V
DD
= 5.5V
V
CM
= –0.3V to 2.5V, V
DD
= 5V
V
CM
= –0.3V to 5.3V, V
DD
= 5V
I
B
I
B
I
B
I
OS
Z
CM
Z
DIFF
±1.0
50
2
±1.0
10 ||6
10
13
||3
13
Sym
V
OS
V
OS
ΔV
OS
/ΔT
A
PSRR
Min
–3.0
–5.0
70
Typ
±1.7
90
Max
+3.0
+5.0
200
5
Units
mV
mV
V
CM
= V
SS
Conditions
T
A
= –40°C to +125°C, V
CM
= V
SS
µV/°C T
A
= –40°C to +125°C, V
CM
= V
SS
dB
pA
pA
nA
pA
V
CM
= V
SS
T
A
= +85°C
T
A
= +125°C
Ω||pF
Ω||pF
5:
6:
The MCP6275’s V
CM
for op amp B (pins V
OUTA
/V
INB
+ and V
INB
–) is V
SS
+ 100 mV.
The current at the MCP6275’s V
INB
– pin is specified by I
B
only.
This specification does not apply to the MCP6275’s V
OUTA
/V
INB
+ pin.
The MCP6275’s V
INB
– pin (op amp B) has a common mode input voltage range (V
CMR
) of V
SS
+ 100 mV to
V
DD
– 100 mV. CMRR is not measured for op amp B of the MCP6275. The MCP6275’s V
OUTA
/V
INB
+ pin (op amp B)
has a voltage range specified by V
OH
and V
OL
.
Set by design and characterization.
Does not apply to op amp B of the MCP6275.
DS21810E-page 2
©
2006 Microchip Technology Inc.