MCP6541/1R/1U/2/3/4
4.4
Externally Set Hysteresis
8
7
25
20
15
10
5
VDD = 5.0V
Greater flexibility in selecting hysteresis (or input trip
points) is achieved by using external resistors.
6
VIN–
5
Input offset voltage (VOS) is the center (average) of the
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (VHYST) is the difference between
the same trip points. Hysteresis reduces output
chattering when one input is slowly moving past the
other and thus reduces dynamic supply current. It also
helps in systems where it is best not to cycle between
states too frequently (e.g., air conditioner thermostatic
control).
VOUT
4
3
0
2
-5
Hysteresis
1
-10
-15
-20
-25
-30
0
-1
-2
-3
Time (100 ms/div)
FIGURE 4-3:
comparators’ internal hysteresis eliminates
output chatter caused by input noise voltage.
The MCP6541/2/3/4
4.4.1
NON-INVERTING CIRCUIT
Figure 4-4 shows a non-inverting circuit for single-
supply applications using just two resistors. The
resulting hysteresis diagram is shown in Figure 4-5.
4.2
Push-Pull Output
The push-pull output is designed to be compatible with
CMOS and TTL logic, while the output transistors are
configured to give rail-to-rail output performance. They
are driven with circuitry that minimizes any switching
current (shoot-through current from supply-to-supply)
when the output is transitioned from high-to-low, or from
low-to-high (see Figures 2-15, 2-18, 2-32 through 2-36
for more information).
VDD
VREF
-
VOUT
MCP654X
+
VIN
R1
RF
Non-inverting circuit with
4.3
MCP6543 Chip Select (CS)
The MCP6543 is a single comparator with Chip Select
(CS). When CS is pulled high, the total current
consumption drops to 20 pA (typ.); 1 pA (typ.) flows
through the CS pin, 1 pA (typ.) flows through the out-
put pin and 18 pA (typ.) flows through the VDD pin, as
shown in Figure 1-1. When this happens, the
comparator output is put into a high-impedance state.
By pulling CS low, the comparator is enabled. If the CS
pin is left floating, the comparator will not operate
properly. Figure 1-1 shows the output voltage and
supply current response to a CS pulse.
FIGURE 4-4:
hysteresis for single-supply.
VOUT
VDD
VOH
High-to-Low
Low-to-High
VIN
VOL
VSS
The internal CS circuitry is designed to minimize
glitches when cycling the CS pin. This helps conserve
power, which is especially important in battery-powered
applications.
VSS
VTHL VTLH
VDD
FIGURE 4-5:
Hysteresis Diagram for the
Non-Inverting Circuit.
The trip points for Figures 4-4 and 4-5 are:
EQUATION 4-1:
R
R
⎛
⎜
⎝
⎞
⎛
⎞
⎟
⎠
1
1
------
⎜
V
= V
1 +------ – V
⎟
TLH
REF
OL
R
R
⎠
⎝
F
F
R
R
⎞
⎛
⎜
⎝
⎛
⎜
⎝
⎞
⎟
⎠
1
1
------
V
= V
1 +------ – V
⎟
THL
REF
OH
R
F
R
⎠
F
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
© 2006 Microchip Technology Inc.
DS21696E-page 15
MICROCHIP [ MICROCHIP ]
