MCP6541/1R/1U/2/3/4
4.0
APPLICATIONS INFORMATION
The MCP6541/2/3/4 family of push-pull output compar-
ators are fabricated on Microchip’s state-of-the-art
CMOS process. They are suitable for a wide range of
applications requiring very low power consumption.
the resistors R
1
and R
2
limit the possible current drawn
out of the input pin. Diodes D
1
and D
2
prevent the input
pin (V
IN
+ and V
IN
–) from going too far above V
DD
.
When implemented as shown, resistors R
1
and R
2
also
limit the current through D
1
and D
2
.
V
DD
D
1
V
1
R
1
D
2
V
2
R
2
R
1
≥
R
2
≥
R
3
4.1
4.1.1
Comparator Inputs
PHASE REVERSAL
+
The MCP6541/1R/1U/2/3/4 comparator family uses
CMOS transistors at the input. They are designed to
prevent phase inversion when the input pins exceed
the supply voltages.
shows an input voltage
exceeding both supplies with no resulting phase
inversion.
MCP6G0X
–
V
OUT
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in
This structure was chosen to pro-
tect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
V
SS
. They also clamp any voltages that go too far
above V
DD
; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass ESD
events within the specified limits.
Bond
Pad
V
SS
– (minimum expected V
1
)
2 mA
V
SS
– (minimum expected V
2
)
2 mA
FIGURE 4-2:
Protecting the Analog Inputs.
V
DD
It is also possible to connect the diodes to the left of the
resistors R
1
and R
2
. In this case, the currents through
the diodes D
1
and D
2
need to be limited by some other
mechanism. The resistor then serves as in-rush current
limiter; the DC current into the input pins (V
IN
+ and
V
IN
–) should be very small.
A significant amount of current can flow out of the
inputs when the common mode voltage (V
CM
) is below
ground (V
SS
); see
Applications that are
high impedance may need to limit the useable voltage
range.
V
IN
+ Bond
Pad
Input
Stage
Bond
Pad
V
IN
–
4.1.3
V
SS
Bond
Pad
NORMAL OPERATION
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuits they are in must limit the
currents (and voltages) at the V
IN
+ and V
IN
– pins (see
at the beginning of
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(V
IN
+ and V
IN
–) from going too far below ground, and
The input stage of this family of devices uses two
differential input stages in parallel: one operates at low
input voltages and the other at high input voltages. With
this topology, the input voltage is 0.3V above V
DD
and
0.3V below V
SS
. Therefore, the input offset voltage is
measured at both V
SS
- 0.3V and V
DD
+ 0.3V to ensure
proper operation.
The MCP6541/1R/1U/2/3/4 family has internally-set
hysteresis that is small enough to maintain input offset
accuracy (<7 mV) and large enough to eliminate output
chattering caused by the comparator’s own input noise
voltage (200 µV
p-p
).
depicts this behavior.
DS21696E-page 14
©
2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
