TC850
FIGURE 3-2:
“FAST SLOW”
REFERENCE DE-
INTEGRATION CYCLE
"Fast" Reference
De-integrate
(9-Bit Resolution)
"Slow" Reference De-integrate
(6-Bit Resolution)
4.0
ANALOG SECTION
DESCRIPTION
The TC850 analog section consists of an input buffer
amplifier, integrator amplifier, comparator and analog
switches. A simplified block diagram is shown in
Figure 4-1.
Signal Integrate
4.1
End of Conversion
Integrator
Output
Auto
Zero
Time
Conversion Timing
Zero Integrator
Signal Integrate
Reference Integrate (or De-integrate)
Each conversion consists of three phases:
1.
2.
3.
0V
Each conversion cycle requires 1280 internal clock
cycles (Figure 4-2).
FIGURE 4-1:
ANALOG SECTION SIMPLIFIED SCHEMATIC
C
REF1
REF1+ REF1-
C
REF1
+
DE
DE
C
REF2
C
REF2
-
C
REF1
-
DE
DE
-
+
Buffer*
Integrator*
–
+
–
+
Comparator*
To Digital
Section
REF2+
C
REF2
-
BUFF
RINT
CINT
INTIN
INTOUT
IN+
INT
DE1
(-)
DE1
(+)
DE1
(-)
DE1
(+)
Z1
ANALOG
COMMON
IN-
DE1
(+)
INT
INT
DE1
(-)
DE2
(+)
DE2
(-)
TC850
*Auto
Zeroed Amplifiers
FIGURE 4-2:
CONVERSION TIMING
1280 Clock Cyles
Internal
Clock
. . . . . . .
. .
. . . . . . . . . . . .
246
256
778
Conversion
Phase
Zero Integrator
Signal Integrate
Reference Integrate
2002 Microchip Technology Inc.
DS21479B-page 9
©