MITSUBISHI MICROCOMPUTERS
3820 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION
Pin
Name
Function
Function except a port function
VCC
VSS
Power source
• Apply voltage of 2.5 V to 5.5 V to VCC, and 0 V to VSS.
(Extended operating temperature version : 3.0 V to 5.5 V)
RESET
XIN
Reset input
Clock input
• Reset input pin for active “L”
• Input and output pins for the main clock generating circuit.
• Feedback resistor is built in between XIN pin and XOUT pin.
• Connect a ceramic resonator or a quartz-crystal oscillator between the XIN and XOUT pins to set
the oscillation frequency.
XOUT
Clock output
• If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open.
• This clock is used as the oscillating source of system clock.
VL1 – VL3
LCD power source
Common output
• Input 0 ≤ VL1 ≤ VL2 ≤ VL3 ≤ VCC voltage
• Input 0 – VL3 voltage to LCD
COM0 – COM3
• LCD common output pins
• COM2 and COM3 are not used at 1/2 duty ratio.
• COM3 is not used at 1/3 duty ratio.
SEG0 – SEG15 Segment output
• LCD segment output pins
• LCD segment pins
• 8-bit I/O port
• CMOS compatible input level
• CMOS 3-state output structure
• I/O direction register allows each port to be individually
programmed as either input or output.
• Pull-down control is enabled.
P00/SEG24
P07/SEG31
–
–
I/O port P0
I/O port P1
I/O port P2
Input port P3
P10/SEG32
P17/SEG39
• 8-bit I/O port
• CMOS compatible input level
• CMOS 3-state output structure
• I/O direction register allows each port to be individually
programmed as either input or output.
• Pull-down control is enabled.
• Key input (key-on wake up) interrupt
• 8-bit I/O port
P20 – P27
input pins
• CMOS compatible input level
• CMOS 3-state output structure
• I/O direction register allows each pin to be individually
programmed as either input or output.
• Pull-up control is enabled.
• LCD segment pins
P30/SEG16
P37/SEG23
–
• 8-bit Input port
• CMOS compatible input level
• Pull-down control is enabled.
P40
Input port P4
I/O port P4
• 1-bit input pin
• CMOS compatible input level
• φ clock output pin
P41/ φ
• 7-bit I/O port
• CMOS compatible input level
• CMOS 3-state output structure
• I/O direction register allows each pin to be individually
programmed as either input or output.
• Pull-up control is enabled.
• Interrupt input pins
P42/INT0,
P43/INT1
• Serial I/O1 function pins
P44/RXD,
P45/TXD,
P46/SCLK1,
P47/SRDY1
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