Freescale Semiconductor,
Guide — 9S12E128DGV1/D V01.04
Inc.
Device User
B.6.2 Slave Mode
In
the timing diagram for slave mode with transmission format CPHA=0 is depicted.
SS
(INPUT)
1
SCK
(CPOL
=
0)
(INPUT)
SCK
(CPOL
=
1)
(INPUT)10
7
MISO
(OUTPUT)
see
note
5
MOSI
(INPUT)
NOTE: Not defined!
SLAVE MSB
6
MSB IN
BIT 6 . . . 1
LSB IN
2
4
4
12
13
8
9
BIT 6 . . . 1
11
11
SEE
NOTE
12
13 3
Freescale Semiconductor, Inc...
SLAVE LSB OUT
Figure B-6 SPI Slave Timing (CPHA=0)
In
the timing diagram for slave mode with transmission format CPHA=1 is depicted.
135
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