Freescale Semiconductor, Inc.
Electrical Specifications
Tables of Data
SS
(INPUT)
5
1
13
12
12
13
3
SCK
(CPOL = 0)
(INPUT)
4
4
2
SCK
(CPOL = 1)
(INPUT)
9
8
10
BIT 6 . . . 1
11
11
MISO
(OUTPUT)
SEE
NOTE
SLAVE LSB OUT
MSB OUT
7
SLAVE
6
MOSI
(INPUT)
BIT 6 . . . 1
MSB IN
LSB IN
NOTE: Not defined but normally MSB of character just received.
A) SPI Slave Timing (CPHA = 0)
SS
(INPUT)
5
3
1
13
12
13
2
SCK
(CPOL = 0)
(INPUT)
4
4
12
11
SCK
(CPOL = 1)
(INPUT)
9
10
MISO
(OUTPUT)
SEE
NOTE
BIT 6 . . . 1
SLAVE LSB OUT
SLAVE
6
MSB OUT
7
8
MOSI
(INPUT)
MSB IN
BIT 6 . . . 1
LSB IN
NOTE: Not defined but normally LSB of character just received.
B) SPI Slave Timing (CPHA = 1)
Figure 20-12. SPI Timing Diagram (2 of 2)
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
385
Electrical Specifications
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MOTOROLA [ MOTOROLA ]
