Freescale Semiconductor, Inc.
Advance Information — 68HC(9)12D60
Section 23. Appendix: 68HC912D60A EEPROM
23.1 Contents
23.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 407
Freescale Semiconductor, Inc...
23.2 Introduction
The 68HC912D60A EEPROM nonvolatile memory is arranged in a 16-
bit configuration. The EEPROM array may be read as either bytes,
aligned words or misaligned words. Access times are one bus cycle for
byte and aligned word access and two bus cycles for misaligned word
operations.
Programming is by byte or aligned word. Attempts to program or erase
misaligned words will fail. Only the lower byte will be latched and
programmed or erased. Programming and erasing of the user EEPROM
can be done in normal modes.
Each EEPROM byte or aligned word must be erased before
programming. The EEPROM module supports byte, aligned word, row
(32 bytes) or bulk erase, all using the internal charge pump. The erased
state is $FF. The EEPROM module has hardware interlocks which
protect stored data from corruption by accidentally enabling the
program/erase voltage. Programming voltage is derived from the
internal V
DD
supply with an internal charge pump.
68HC(9)12D60 — Rev 4.0
MOTOROLA
Appendix: 68HC912D60A EEPROM
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Advance Information
407
MOTOROLA [ MOTOROLA, INC ]
