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NJU39610FM2 参数 Datasheet PDF下载

NJU39610FM2图片预览
型号: NJU39610FM2
PDF下载: 下载PDF文件 查看货源
内容描述: 微步电动机控制器,带有双路DAC [MICROSTEPPING MOTOR CONTROLLER WITH DUAL DAC]
分类和应用: 电动机控制控制器
文件页数/大小: 11 页 / 161 K
品牌: NJRC [ NEW JAPAN RADIO ]
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NJU39610
s
DEFINITION OF TERMS
Resolution
Resolution is defined as the reciprocal of the number of discrete steps in the DAC output. It is directly related to the
number of switches or bits within the DAC. For example, NJU39610 has 2
7
, or 128, output levels and therefor has 7
bits resolution. Remember that this is not equal to the number of microsteps available.
Linearity Error
Linearity error is the maximum deviation from a straight line passing through the end points of the DAC transfer
characteristic. It is measured after adjusting for zero and full scale. Linearity error is a parameter intrinsic to the
device and cannot be externally adjusted.
Power Supply Sensitivity
Power supply sensitivity is a measure of the effect of power supply changes on the DAC full-scale output
Settling Time
Full-scale current settling time requires zero-to-full-scale or full-scale-to-zero output change. Settling time is the
time required from a code transition until the DAC output reaches within
±
1
/
2
LSB of the final output value.
Full-scale ErrorFull-scale error is a measure of the output error between an ideal DAC and the actual device output.
Differential Non-linearity
The difference between any two consecutive codes in the transfer curve from the theoretical 1LSB, is differential
non-linearity
Monotonic
If the output of a DAC increases for increasing digital input code, then the DAC is monotonic. A 7-bit DAC which is
monotonic to 7 bits simply means that increasing digital input codes will produce an increasing analog output.
NJU39610 is monotonic to 7 bits.
s
FUNCTIONAL DESCRIPTION
Each DAC channel contains two registers, a digital comparator, a flip flop, and a D/A converter. A block diagram is
shown on the first page. One of the registers stores the current level, below which, fast current decay is initiated.
The status of the CD outputs determines a fast or slow current decay to be used in the driver.
The digital comparator compares each new value with the previous one and the value for the preset level for fast
current decay. If the new value is strictly lower than both of the others, a fast current decay condition exists. The flip
flop sets the CD output. The CD output is updated each time a new value is loaded into the D/A register. The fast
current decay signals are used by the driver circuit, NJM3771, to change the current control scheme of the output
stages. This is to avoid motor current dragging which occurs at high stepping rates and during the negative current
slopes, as illustrated in figure 9. Eight different levels for initiation of fast current decay can be selected.
The sign outputs generate the phase shifts, i.e., they reverse the current direction in the phase windings.
Output
Output
Output
Actual
Gain
error
Correct
Endpoint
non-linearity
More
than 2
bits
Less
than 2
bits
Negative
difference
Positive
difference
Offset error
Full scale
Input
Input
Input
Figure 5. Errors in D/A conversion.
Figure 4. Errors in D/A conversion.
Figure 3. Errors in D/A conversion.
Differential non-linearity of more than Differential non-linearity of less than 1 Non-linearity, gain and offset errors.
bit, output is monotonic.
1 bit, output is non-monotonic.