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NJU39610FM2 参数 Datasheet PDF下载

NJU39610FM2图片预览
型号: NJU39610FM2
PDF下载: 下载PDF文件 查看货源
内容描述: 微步电动机控制器,带有双路DAC [MICROSTEPPING MOTOR CONTROLLER WITH DUAL DAC]
分类和应用: 电动机控制控制器
文件页数/大小: 11 页 / 161 K
品牌: NJRC [ NEW JAPAN RADIO ]
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NJU39610
Data Bus Interface
NJU39610 is designed to be compatible with 8-bit microprocessors such as the 6800, 6801, 6803, 6808, 6809,
8051, 8085, Z80 and other popular types and their 16/32 bit counter parts in 8 bit data mode. The data bus inter-
face consists of 8 data bits, write signal, chip select, and two address pins. All inputs are TTL-compatible (except
reset). The two address pins control data transfer to the four internal D-type registers. Data is transferred according
to figure 10 and on the positive edge of the write signal.
Current Direction, Sign
1
& Sign
2
These bits are transferred from D
7
when writing in the respective DA register. A
0
and A
1
must be set according to
the data transfer table in figure 10.
Current Decay, CD
1
& CD
2
CD
1
and CD
2
are two active low signals (LOW = fast current decay). CD
1
is active if the previous value of DA-Data1
is strictly larger than the new value of DA-Data1 and the value of the level register LEVEL1 (L
61
… L
41
) is strictly
larger than the new value of DA-Data1. CD
1
is updated every time a new value is loaded into DA-Data1.
The logic definition of CD
1
is:
CD
1
= NOT{[(D
6
… D
0
) < (Q
61
… Q
01
)] AND[(D
6
…D
4
) < (L
61
… L
41
)]}
Where (D
6
… D
0
) is the new value being sent to DA-Data1 and (Q
61
… Q
01
) is DA-Data1’s old value. (L
61
… L
41
) are
the three bits for setting the current decay level at LEVEL1.
The logic definition of CD
2
is analog to CD
1
:
CD
2
= NOT{[(D
6
… D
0
) < (Q
62
… Q
02
)] AND[(D
6
…D
4
) < (L
62
… L
42
)]}
Where (L
62
… L
42
) is the level programmed in channel 2’s level register. (D
6
… D
0
) and (Q
62
… Q
02
) are the new and
old values of DA-Data2.
The two level registers, LEVEL1 and LEVEL2, consist of three flip flops each and they are compared against the
three most significant bits of the DA-Data value, sign bit excluded.
I
2
[mA]
T max
T
2
[mNm]
DA output [V]
Current dragging
Tnom
Tmin
I
CD
t
T
1
[mNm]
I
1
[mA]
Time
Figure 6a. Assuming that torque is
proportional to the current in resp.
winding it is possible to draw figure
8b.
Figure 6b. An example of accessible
positions with a given torque devia-
tion/fullstep. Note that 1:st
µstep
sets highest resolution. Data points
are exaggerated for illustration
purpose.
TNom = code 127.
Figure 7. Motor current dragging at
high step rates and current decay
influence. Fast current decay will
make it possible for the current to
follow the ideal sine curve. Output
shown without sign shift.
CS
0
0
0
0
1
A0
0
0
1
1
X
A1
0
1
0
1
X
Data Transfer
D7 —> Sign1, (D6—D0) —> (Q61—Q01), New value —> CD1
(D6—D4) —> (L61—L41)
D7 —> Sign2, (D6—D0) —> (Q62—Q02), New value —> CD2
(D6—D4) —> (L62—L42)
No Transfer
Figure 8. Table showing how data is transfered inside NJU39610.