CF5036 series
PAD LAYOUT
(Unit:
µ
m)
OUT OUTN VCC2 OE
8
7
6
5
(1100,1300)
Y
TEST
9
DB5036
1
2
3
4
(0,0)
VCC
XIN XOUT GND
X
Chip size: 1.10
×
1.30mm
Chip thickness: 300 ± 30µm
PAD size: 150µm
×
100µm (VCC, OUT, OUTN pins)
100µm
×
100µm (excluding VCC, OUT, OUTN pins)
Chip base: GND potential
Note: The TEST pin is not used during normal operation.
PIN DESCRIPTION and PAD DIMENSIONS
Pad dimensions [µm]
Pad No.
1
2
3
4
5
6
7
8
9
Name
VCC
XIN
XOUT
GND
OE
VCC2
OUTN
OUT
TEST
I/O
–
I
O
–
I
–
O
O
I
(+) supply pin
Oscillator input pin
Oscillator output pin
(–) ground pin
Output enable pin. Outputs are high impedance when LOW (oscillator
stopped). Power-saving pull-up resistor built-in.
(+) output buffer supply pin
Output pin (complementary)
Output pin (true)
IC test pin. Leave open circuit for normal operation.
Function
X
160
511
740
965
896
756
523
244
136
Y
130
130
130
130
1170
1170
1170
1170
678
SEIKO NPC CORPORATION —2