Geode™ CS4210
Operational Description
(Continued)
3.5.1 Unrecoverable Error
If an unrecoverable error occurs when the CS4210 is writ-
ing to the AR DMA request buffer, a fail indication is sent to
the link side of the FIFO. This indicates that the link side
should set its count to zero which will busy further read
requests and write requests that are destined for the AR
DMA request buffer. If the AR DMA request context has an
unrecoverable error, the system side of the FIFO continues
to unload the FIFO even though the AR DMA request con-
text is dead. All asynchronous requests that would have
been sent to the AR DMA request queue are dropped and
no responses for them are sent to the initiating node. Drop-
ping requests destined for the AR DMA request queue is
acceptable because:
1)
2)
3)
AR DMA read requests are always split transactions
(ack_pended),
write requests within the physical range have been
ack_pended and
write requests above the physical range which have
been posted (ack_completed) are by definition permit-
ted to fail.
successfully written to the addressed location in physical
memory. If posting of physical writes is enabled, then the
CS4210 is allowed to return ack_complete to a physical
write request with certain restrictions. This CS4210 sup-
ports four posted writes. However, for error reporting pur-
poses a posted write is considered pending until the write
is actually completed to the offset address. For each pend-
ing posted write, there is an error reporting register to hold
the request’s source node ID and 48-bit offset address
should that posted write fail. If the maximum allowed
posted writes are pending, the CS4210 must return either
ack_pending or ack_busy* for subsequent posted write
request candidates and only return resp_complete when
those writes have actually been performed. Read and write
requests within the Asynchronous Request FIFO do not
pass any posted writes, whether posted in the Physical or
Asynchronous Request FIFOs. Within the Physical
Request FIFO, read requests may coherently pass posted
writes, but write requests and posted writes do not pass
other writes posted in the Physical Request FIFO. Physical
read and write requests may pass writes posted to the
Asynchronous Request FIFO.
In conjunction with the ordering rules, the following protocol
restrictions are adhered to so that proper ordering and
therefore data integrity is maintained. The term “visible
side-effect” is used to mean an indirect action caused by a
request or response which results in the alteration of the
contents or usage of host memory outside the address
scope of the request or response.
1)
Write requests within the range 0000_FFFF_FFFFh to
FFFE_FFFF_FFFFh do not have 1394 visible side
effects.
Read or write requests within the range 0h to
0_FFFF_FFFEh, whether handled by the Physical
Request controller or not, do not have 1394 visible
side-effects.
Read requests to CSR addresses which are pro-
cessed autonomously by the CS4210 (Section 4.4.4
have 1394 visible side-effects.
If an error occurs in writing the posted data packet, the
CS4210 sets an interrupt event to notify software and
provides information about the failed write in an error
reporting register. For more information about error
handling of posted writes, refer to Section 3.7.7
3.5.2 Ack Codes for Write Requests
For write requests that are handled by the physical request
controller, the CS4210 may send an ack_complete before
the data is actually written to system memory. For a full
description of which requests are candidates for physical
requests, refer to Section 3.6 "Physical Requests" on page
range of 0000_FFFF_FFFFh to FFFE_FFFF_FFFFh when
not busied is always ack_complete. The ack_code sent for
requests to offsets in the range FFFF_0000_0000h to
FFFF_FFFF_FFFFh and for block requests with a non-zero
extended tcode is always ack_pending.
3.5.3 Posted Writes
As described above, a write request that is handled by the
physical request controller or which is in the address range
0000_FFFF_FFFFh to FFFE_FFFF_FFFFh to be handled
by the asynchronous request unit, may generate an
ack_complete before the data is actually written to the des-
ignated system memory location. These writes are referred
to as posted writes. Write requests to the physical memory
range of the host may be posted if software has enabled
posted writes (see Section 4.4.10 "PostedWriteAddress
CS4210 will not return a complete indication
(ack_complete or resp_complete) until the data has been
2)
3)
4)
www.national.com
24
Revision 1.0
NSC [ NATIONAL SEMICONDUCTOR ]
