欢迎访问ic37.com |
会员登录 免费注册
发布采购

JS28F128J3D75A 参数 Datasheet PDF下载

JS28F128J3D75A图片预览
型号: JS28F128J3D75A
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 8MX16, 75ns, PDSO56, 14 X 20 MM, LEAD FREE, TSOP-56]
分类和应用: 光电二极管内存集成电路闪存
文件页数/大小: 66 页 / 769 K
品牌: NUMONYX [ NUMONYX B.V ]
 浏览型号JS28F128J3D75A的Datasheet PDF文件第35页浏览型号JS28F128J3D75A的Datasheet PDF文件第36页浏览型号JS28F128J3D75A的Datasheet PDF文件第37页浏览型号JS28F128J3D75A的Datasheet PDF文件第38页浏览型号JS28F128J3D75A的Datasheet PDF文件第40页浏览型号JS28F128J3D75A的Datasheet PDF文件第41页浏览型号JS28F128J3D75A的Datasheet PDF文件第42页浏览型号JS28F128J3D75A的Datasheet PDF文件第43页  
Numonyx™ Embedded Flash Memory (J3 v D, Monolithic)  
9.3.1  
Single-Word/Byte Programming  
Array programming is performed by first issuing the Single-Word/Byte Program  
command. This is followed by writing the desired data at the desired array address. The  
read mode of the device is automatically changed to Read Status Register mode, which  
remains in effect until another read-mode command is issued.  
During programming, STS and the Status Register indicate a busy status (SR.7 = 0).  
Upon completion, STS and the Status Register indicate a ready status (SR.7 = 1). The  
Status Register should be checked for any errors (SR.4), then cleared.  
Note:  
Issuing the Read Array command to the device while it is actively programming causes  
subsequent reads from the device to output invalid data. Valid array data is output only  
after the program operation has finished.  
Standby power levels are not be realized until the programming operation has finished.  
Also, asserting RP# aborts the programming operation, and array contents at the  
addressed location are indeterminate. The addressed block should be erased, and the  
data re-programmed. If a Single-Word/Byte program is attempted when the  
corresponding block lock-bit is set, SR.1 and SR.4 will be set.  
9.3.2  
Buffered Programming  
Buffered programming operations simultaneous program multiple words into the flash  
memory array, significantly reducing effective word-write times. User-data is first  
written to a write buffer, then programmed into the flash memory array in buffer-size  
increments. For additional details, see the flow chart of the buffered-programming  
operation.  
Note:  
Optimal performance and power consumption is realized only by aligning the start  
address on 32-word boundaries (i.e., A[4:0] = 0b00000b). Crossing a 32-word  
boundary during a buffered programming operation can cause programming time to  
double.  
To perform a buffered programming operation, first issue the Buffered Program setup  
command at the desired starting address. The read mode of the device/addressed  
partition is automatically changed to Read Status Register mode.  
Polling SR.7 determines write-buffer availability (0 = not available, 1 = available). If  
the write buffer is not available, re-issue the setup command and check SR.7; repeat  
until SR.7 = 1.  
Next, issue the word count at the desired starting address. The word count represents  
the total number of words to be written into the write buffer, minus one. This value can  
range from 00h (one word) to a maximum of 1Fh (32 words). Exceeding the allowable  
range causes an abort.  
Following the word count, the write buffer is filled with user-data. Subsequent bus-  
write cycles provide addresses and data, up to the word count. All user-data addresses  
must lie between <starting address> and <starting address + word count>, otherwise  
the WSM continues to run as normal but, user may advertently change the content in  
unexpected address locations.  
Note:  
User-data is programmed into the flash array at the address issued when filling the  
write buffer.  
After all user-data is written into the write buffer, issue the confirm command. If a  
command other than the confirm command is issued to the device, a command  
sequence error occurs and the operation aborts.  
December 2007  
316577-06  
Datasheet  
39