Numonyx™ StrataFlash
®
Cellular Memory (M18)
1.0
Introduction
Numonyx™ StrataFlash
®
Cellular Memory is the sixth generation Numonyx™
StrataFlash
®
memory with multi-level cell (MLC) technology. It provides high-
performance, low-power synchronous-burst read mode and asynchronous read mode
at 1.8 V. It features flexible, multi-partition read-while-program and read-while-erase
capability, enabling background programming or erasing in one partition
simultaneously with code execution or data reads in another partition. The eight
partitions allow flexibility for system designers to choose the size of the code and data
segments. The Numonyx™ StrataFlash
®
Cellular Memory is manufactured using Intel*
65 nm ETOX* X and 90 nm ETOX* IX process technology and is available in industry-
standard chip-scale packaging.
1.1
Document Purpose
This document describes the specifications of the Numonyx™ StrataFlash® Cellular
Memory device.
1.2
Table 1:
Nomenclature
Definition of Terms
Term
Definition
Refers to VCC and VCCQ voltage range of 1.7 V to 2.0 V
A group of bits that erase with one erase command
A group of 256-KB blocks used for storing code or data
A group of blocks that share common program and erase circuitry and command status register
An aligned 1-KB section within the main array
A 32-byte section within the programming region
8 bits
2 bytes = 16 bits
1024 bits
1024 bytes
1024 words
1,048,576 bits
1,048,576 bytes
1.8 V
Block
Main Array
Partition
Programming Region
Segment
Byte
Word
Kb
KB
KW
Mb
MB
1.3
Table 2:
Acronyms
List of Acronyms
Meaning
Automatic Power Savings
Common Flash Interface
Don’t Use
Enhanced Configuration Register (Flash)
Acronym
APS
CFI
DU
ECR
Datasheet
8
April 2008
309823-10
NUMONYX [ NUMONYX B.V ]
