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JLC1562BF 参数 Datasheet PDF下载

JLC1562BF图片预览
型号: JLC1562BF
PDF下载: 下载PDF文件 查看货源
内容描述: I2C总线I / O扩展器 [I2C Bus I/O Expander]
分类和应用: 并行IO端口微控制器和处理器外围集成电路光电二极管
文件页数/大小: 9 页 / 90 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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JLC1562B
I
2
C Bus I/O Expander
The JLC1562B facilitates easy I
2
C Bus expandibility. Multiple
devices (up to 8 on the same I
2
C Bus) are easily added as each device
has its own selectable 3−bit address. The JLC1562B provides an 8−bit
bidirectional input/output port and 6−bit resolution Digital to Analog
Converter. The voltage on pins P0−P4 is compared with a controllable
threshold voltage and the results are readable through the I
2
C Bus.
I
2
C Bus interface pins SDA, SCL and A0−A2 are; Serial Data,
Serial Clock and Device Address respectively. External interface pins
are P0−P7 and VDAC; I/O Port and D/A output.
Features
http://onsemi.com
MARKING
DIAGRAMS
PDIP−16
N SUFFIX
CASE 648
1
16
JLC1562BN
AWLYYWWG
1
16
SOEIAJ−16
F SUFFIX
CASE 966
1
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
JLC1562B
ALYWG
Low Power Dissipation
I
2
C−Bus Format (2−Wire Type; SDA, SCL) Data Transfer
6−bit DAC
Bus Address Selectable (3−bit)
Address Input Pins are Pulled Up to V
DD
with Internal Resistor
I/O Pins are Open Drain Outputs
5 Comparators at Inputs
Inputs Protected from External Bus Currents in Power Down Mode
Pb−Free Packages are Available*
A0
A1
A2
P0
P1
P2
P3
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
SDA
SCL
VDAC
P7
P6
P5
P4
ORDERING INFORMATION
Device
JLC1562BN
JLC1562BNG
JLC1562BF
JLC1562BFG
JLC1562BFEL
JLC1562BFELG
Package
PDIP−16
PDIP−16
(Pb−Free)
SOEIAJ−16
SOEIAJ−16
(Pb−Free)
SOEIAJ−16
SOEIAJ−16
(Pb−Free)
Shipping
25 Units/Tube
25 Units/Tube
50 Units/Rail
50 Units/Rail
2000/Tape & Reel
2000/Tape & Reel
Figure 1. Pin Assignment
PIN LIST
A0−A2
P0−P4
P5−P7
SCL
SDA
VDAC
Chip Address Input
Comparator Input / Open Drain Output
Comparator Input / Open Drain Output
Serial Clock Input
I
2
C Data Output
DAC Output
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
November, 2005 − Rev. 5
Publication Order Number:
JLC1562B/D