MC10EL05, MC100EL05
ORDERING INFORMATION
Device
†
Package
Shipping
MC10EL05D
SOIC−8
98 Units / Rail
98 Units / Rail
MC10EL05DG
SOIC−8
(Pb−Free)
MC10EL05DR2
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
MC10EL05DR2G
SOIC−8
(Pb−Free)
MC10EL05DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC10EL05DTG
TSSOP−8
(Pb−Free)
MC10EL05DTR2
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
MC10EL05DTR2G
TSSOP−8
(Pb−Free)
MC10EL05MNR4
MC10EL05MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
MC100EL05D
SOIC−8
98 Units / Rail
98 Units / Rail
MC100EL05DG
SOIC−8
(Pb−Free)
MC100EL05DR2
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
MC100EL05DR2G
SOIC−8
(Pb−Free)
MC100EL05DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC100EL05DTG
TSSOP−8
(Pb−Free)
MC100EL05DTR2
MC100EL05DTR2G
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−8
(Pb−Free)
MC100EL05MNR4
MC100EL05MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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