M
ELI
PR
.
.
tion hange
c
ifica
pec ject to
al s sub
a fin
e
not mits ar
is
i
This etric l
m
ice:
Not e para
Som
ARY
IN
MITSUBISHI MICROCOMPUTERS
M37920S4CGP
16-BIT CMOS MICROCOMPUTER
Address
Port P0 direction register
Port P1 direction register
Port P2 direction register
Port P3 direction register
Port P4 direction register
Port P5 direction register
Port P6 direction register
Port P7 direction register
Port P8 direction register
Port P9 direction register
Port P10 direction register
Port P11 direction register
Port P12 direction register
A-D control register 0
A-D control register 1
UART 0 Transmit/Receive mode register
UART 1 Transmit/Receive mode register
UART 0 Transmit/Receive control register 0
UART 1 Transmit/Receive control register 0
UART 0 Transmit/Receive control register 1
UART 1 Transmit/Receive control register 1
Count start register
One-shot start register
Up-down register
Timer A clock division select register
Timer A0 mode register
Timer A1 mode register
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
Timer B0 mode register
Timer B1 mode register
Timer B2 mode register
(04
16
)···
(05
16
)···
(08
16
)···
(09
16
)···
(0C
16
)···
(0D
16
)···
(10
16
)···
(11
16
)···
(14
16
)···
(15
16
)···
(18
16
)···
(19
16
)···
(1C
16
)···
00
16
00
16
00
16
0 0 0 0
0 0 0 0 0
00
16
0 0 0 0 0 0 0
0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
00
16
00
16
0 0 0
Processor mode register 0
Processor mode register 1
Watchdog timer
Watchdog timer frequency select register
Particular function select register 0
Particular function select register 1
Debug control register 0
Debug control register 1
INT
3
interrupt control register
INT
4
interrupt control register
A-D conversion interrupt control register
UART 0 transmit interrupt control register
UART 0 receive interrupt control register
UART 1 transmit interrupt control register
UART 1 receive interrupt control register
Timer A0 interrupt control register
Timer A1 interrupt control register
Timer A2 interrupt control register
Timer A3 interrupt control register
Timer A4 interrupt control register
Timer B0 interrupt control register
Timer B1 interrupt control register
Timer B2 interrupt control register
INT
0
interrupt control register
INT
1
interrupt control register
INT
2
interrupt control register
Processor status register PS
Program bank register PG
Program counter PC
H
Program counter PC
L
Direct page registers DPR0 to DPR3
Data bank register DT
Stack pointer
Address
(5E
16
)···
(Note 2)
0 0 0 1 0
(5F
16
)··· 0 0
(60
16
)···
(61
16
)···
(62
16
)···
(63
16
)···
(66
16
)··· 1
(67
16
)··· 0 0 0
(6E
16
)···
(6F
16
)···
(70
16
)···
(71
16
)···
(72
16
)···
(73
16
)···
(74
16
)···
(75
16
)···
(76
16
)···
(77
16
)···
(78
16
)···
(79
16
)···
(7A
16
)···
(7B
16
)···
(7C
16
)···
(7D
16
)···
(7E
16
)···
(7F
16
)···
(Note 2)
(Note 2)
0
0 0
FFF
16
0
0 0
0 0
(Note 3)
(Note 3)
(Note 3)
0 0 0
(Note 3)
0 0 0 0
0 0 0 0
? 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
(1E
16
)··· 0 0 0 0 0 ? ? ?
(1F
16
)···
(30
16
)···
(38
16
)···
0 0 0 0 0 0 1
00
16
00
16
(34
16
)··· 0 0 0 0 1 0 0 0
(3C
16
)··· 0 0 0 0 1 0 0 0
(35
16
)··· 0 0 0 0 0 0 1 0
(3D
16
)··· 0 0 0 0 0 0 1 0
(40
16
)···
(42
16
)··· 0
00
16
0 0 0 0 0
(44
16
)··· 0 0 0 0 0 0 0 0
(45
16
)···
(56
16
)···
(57
16
)···
(58
16
)···
(59
16
)···
(5A
16
)···
(5B
16
)··· 0 0 ?
(5C
16
)··· 0 0 ?
(5D
16
)··· 0 0 ?
00
16
00
16
00
16
00
16
00
16
0 0 0 0
0 0 0 0
0 0 0 0
0 0
0 0 0 ? ? 0 0 0 1 ? ?
00
16
Contents at address FFFF
16
Contents at address FFFE
16
0000
16
00
16
FFF
16
Notes 1:
The contents of the other registers and RAM are undefined at reset and must be initialized by software.
2:
The status just after reset depends on the voltage level applied to pin MD0.
3:
At power-on reset, these bits are clear to “0”. At hardware or software reset, on the other hand, these bits retain the state just before reset.
Fig. 6 Microcomputer internal status just after reset (1)
12
RENESAS [ RENESAS TECHNOLOGY CORP ]
