欢迎访问ic37.com |
会员登录 免费注册
发布采购

R5F2L388CNFP 参数 Datasheet PDF下载

R5F2L388CNFP图片预览
型号: R5F2L388CNFP
PDF下载: 下载PDF文件 查看货源
内容描述: 这些团体有数据闪存( 1 KB × 4块)与后台操作( BGO ) [These groups have data flash (1 KB × 4 blocks) with the background operation (BGO)]
分类和应用: 闪存
文件页数/大小: 75 页 / 868 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号R5F2L388CNFP的Datasheet PDF文件第7页浏览型号R5F2L388CNFP的Datasheet PDF文件第8页浏览型号R5F2L388CNFP的Datasheet PDF文件第9页浏览型号R5F2L388CNFP的Datasheet PDF文件第10页浏览型号R5F2L388CNFP的Datasheet PDF文件第12页浏览型号R5F2L388CNFP的Datasheet PDF文件第13页浏览型号R5F2L388CNFP的Datasheet PDF文件第14页浏览型号R5F2L388CNFP的Datasheet PDF文件第15页  
R8C/L35C Group, R8C/L36C Group, R8C/L38C Group, R8C/L3AC Group
1. Overview
1.3
Block Diagrams
8
4
4
8
I/O ports
Port P0
Port P2
Port P3
Port P4
Peripheral functions
Timers
Timer RA (8 bits
×
1)
Timer RB (8 bits
×
1)
Timer RC (16 bits
×
1)
Timer RD (16 bits
×
2)
Timer RE (8 bits
×
1)
Timer RG (16 bits
×
1)
UART or
clock synchronous serial I/O
(8 bits
×
3)
I
2
C bus or SSU
(8 bits
×
1)
System clock generation
circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
XCIN-XCOUT
Port P7
4
DTC
LIN module
Port P11
Low-speed on-chip oscillator
for watchdog timer
LCD drive control circuit
Port P12
Watchdog timer
(14 bits)
5
A/D converter
(10 bits
×
10 channels)
Comparator B
Common output: Max. 4 pins
Segment output: Max. 24 pins
4
D/A converter
(8 bits
×
2 channels)
R8C CPU core
R0H
R1H
R2
R3
A0
A1
FB
R0L
R1L
SB
USP
ISP
INTB
PC
FLG
Memory
Port P13
ROM
(1)
4
Voltage detection circuit
RAM
(2)
Multiplier
Notes:
1. ROM capacity varies with MCU type.
2. RAM capacity varies with MCU type.
Figure 1.5
Block Diagram of R8C/L35C Group
R01DS0095EJ0101 Rev.1.01
Apr 15, 2011
Page 11 of 72