CY28409
AC Electrical Specifications (continued)
Parameter
CPU at 0.7V
TDC
Description
Condition
Min.
Max.
Unit
CPUT and CPUC Duty Cycle
Measured at crossing point VOX
Measured at crossing point VOX
Measured at crossing point VOX
Measured at crossing point VOX
45
9.9970
7.4978
4.9985
–
55
10.003
7.5023
5.0015
100
ꢀ
ns
ns
ns
ps
ps
ps
ꢀ
TPERIOD
TPERIOD
TPERIOD
TSKEW
TCCJ
100-MHz CPUT and CPUC Period
133-MHz CPUT and CPUC Period
200-MHz CPUT and CPUC Period
Any CPUT/C to CPUT/C Clock Skew Measured at crossing point VOX
CPUT/C Cycle to Cycle Jitter Measured at crossing point VOX
CPUT and CPUC Rise and Fall Times Measured from VOL = 0.175 to VOH = 0.525V
–
125
TR / TF
TRFM
175
–
700
Rise/Fall Matching
Determined as a fraction of 2*(TR – TF)/(TR + TF)
20
'TR
'TF
VHIGH
VLOW
VOX
Rise Time Variation
–
125
ps
ps
mV
mV
mV
V
Fall Time Variation
–
125
Voltage High
Math averages Figure 11
Math averages Figure 11
660
–150
250
–
850
Voltage Low
–
Crossing Point Voltage at 0.7V Swing
Maximum Overshoot Voltage
Minimum Undershoot Voltage
Ring Back Voltage
550
VOVS
VHIGH + 0.3
–
VUDS
–0.3
–
V
VRB
See Figure 11. Measure SE
0.2
V
SRC
TDC
SRCT and SRCC Duty Cycle
100 MHz SRCT and SRCC Period
200 MHz SRCT and SRCC Period
SRCT/C Cycle to Cycle Jitter
SRCT/C Long Term Accuracy
Measured at crossing point VOX
Measured at crossing point VOX
Measured at crossing point VOX
Measured at crossing point VOX
Measured at crossing point VOX
45
9.9970
4.9985
–
55
10.003
5.0015
125
ꢀ
ns
ns
ps
ppm
ps
ꢀ
TPERIOD
TPERIOD
TCCJ
LACC
–
300
TR / TF
TRFM
SRCT and SRCC Rise and Fall Times Measured from VOL = 0.175 to VOH = 0.525V
175
–
700
Rise/Fall Matching
Determined as a fraction of 2*(TR – TF)/(TR + TF)
20
'TR
'TF
VHIGH
VLOW
VOX
Rise Time Variation
–
125
ps
ps
mV
mV
mV
V
Fall Time Variation
–
125
Voltage High
Math averages Figure 11
Math averages Figure 11
660
–150
250
–
850
Voltage Low
–
Crossing Point Voltage at 0.7V Swing
Maximum Overshoot Voltage
Minimum Undershoot Voltage
Ring Back Voltage
550
VOVS
VHIGH + 0.3
–
VUDS
–0.3
–
V
VRB
See Figure 11. Measure SE
0.2
V
3V66
TDC
3V66 Duty Cycle
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 2.0V
Measurement at 0.8V
Measured between 0.8V and 2.0V
Measurement at 1.5V
Measurement at 1.5V
45
55
ꢀ
ns
ns
ns
ns
ns
ps
ps
TPERIOD
TPERIOD
THIGH
TLOW
Spread Disabled 3V66 Period
Spread Enabled 3V66 Period
3V66 High Time
14.9955 15.0045
14.9955 15.0799
4.9500
–
3V66 Low Time
4.5500
–
TR / TF
TSKEW
TCCJ
3V66 Rise and Fall Times
Any 3V66 to Any 3V66 Clock Skew
3V66 Cycle to Cycle Jitter
0.5
–
2.0
250
250
–
PCI/PCIF
TDC
PCI Duty Cycle
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 2.0V
Measurement at 0.8V
45
55
ꢀ
ns
ns
ns
ns
TPERIOD
TPERIOD
THIGH
TLOW
Spread Disabled PCIF/PCI Period
Spread Enabled PCIF/PCI Period
PCIF and PCI high time
PCIF and PCI low time
29.9910 30.0009
29.9910 30.1598
12.0
12.0
–
–
Rev 1.0,November 22, 2006
Page 13 of 16