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CY28439OXCT 参数 Datasheet PDF下载

CY28439OXCT图片预览
型号: CY28439OXCT
PDF下载: 下载PDF文件 查看货源
内容描述: 时钟发生器为英特尔的Grantsdale芯片组 [Clock Generator for Intel Grantsdale Chipset]
分类和应用: 晶体时钟发生器外围集成电路光电二极管
文件页数/大小: 21 页 / 192 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28439
Byte 6: Control Register 6
Bit
7
6
5
4
3
@Pup
0
0
HW
1
1
Name
TEST_SEL
TEST_MODE
FS_D
REF
REF/N or Tri-state Select
0 = Tri-state, 1 = REF/N Clock
Test Clock Mode Entry Control
0 = Normal operation, 1 = REF/N or Tri-state mode
FS_D reflects the value of the FS_D pin sampled on power-up.
0 = FS_D was low during VTT_PWRGD# assertion
REF Output Drive Strength
0 = High, 1 = Low
Description
PCI, PCIF and SRC clock SW PCI_STP# Function
outputs except those set 0=SW PCI_STP# assert, 1= SW PCI_STP# deassert
to free running
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs will
resume in a synchronous manner with no short pulses.
FS_C
FS_B
FS_A
FS_C Reflects the value of the FS_C pin sampled on power-up
0 = FS_C was low during VTT_PWRGD# assertion
FS_B Reflects the value of the FS_B pin sampled on power-up
0 = FS_B was low during VTT_PWRGD# assertion
FS_A Reflects the value of the FS_A pin sampled on power-up
0 = FS_A was low during VTT_PWRGD# assertion
2
1
0
HW
HW
HW
Byte 7: Vendor ID
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
1
0
0
0
Name
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Description
Byte 8: Control Register 8
Bit
7
@Pup
0
Name
CPU_SS
Description
Spread Selection for CPU PLL
0: –0.5% (peak to peak)
1: –1.0% (peak to peak)
Spread Selection for CPU PLL
0: Down spread.
1: Center spread
SRC Spread Spectrum Enable
0 = Spread off, 1 = Spread on
Spread Selection for SRC PLL
0: –0.5% (peak to peak)
1: –1.0% (peak to peak)
RESERVED, Set = 0
USB 48-MHz Output Drive Strength
0 = 2x, 1 = 1x
33-MHz Output Drive Strength
0 = 2x, 1 = 1x
RESERVED
6
0
CPU_DWN_SS
5
4
0
0
SRC_SS_OFF
SRC_SS
3
2
1
0
0
1
1
0
RESERVED
USB
PCI
RESERVED
Rev 1.0, November 21, 2006
Page 7 of 21