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CY28446LFXC 参数 Datasheet PDF下载

CY28446LFXC图片预览
型号: CY28446LFXC
PDF下载: 下载PDF文件 查看货源
内容描述: 时钟发生器Intel㈢ Calistoga的芯片组 [Clock Generator for Intel㈢ Calistoga Chipset]
分类和应用: 时钟发生器
文件页数/大小: 19 页 / 180 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28446
Byte 8: Control Register 7
Bit
7
6
5
4
3
2
1
0
@Pup
0
1
1
1
0
0
0
0
Name
Reserved
SRC[T/C]10
SRC[T/C]9
SRC[T/C]8
Reserved
SRC10
SRC9
SRC8
Reserved set to 0
SRC[T/C]10 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]9 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]8 Output Enable
0 = Disable (Tri-state), 1 = Enable
Reserved set to 0
Allow control of SRC[T/C]10 with assertion of OEA#
0 = Free running, 1 = Stopped with OEA#
Allow control of SRC[T/C]9 with assertion of OEB#
0 = Free running, 1 = Stopped with OEB#
Allow control of SRC[T/C]8 with assertion of OEA#
0 = Free running, 1 = Stopped with OEA#
Description
Byte 9: Control Register 8
Bit
7
6
5
4
3
2
1
0
.
@Pup
0
0
0
0
0
1
1
1
Name
PCI3
PCI2
PCI1
PCI0
PCIF0
Reserved
Reserved
Reserved
33-MHz Output drive strength
0 = Low, 1 = High
33-MHz Output drive strength
0 = Low, 1 = High
33-MHz Output drive strength
0 = Low, 1 = High
33-MHz Output drive strength
0 = Low, 1 = High
33-MHz Output drive strength
0 = Low, 1 = High
Reserved set to 1
Reserved set to 1
Reserved set to 1
Description
Crystal Recommendations
Frequency
(Fund)
14.31818 MHz
Cut
AT
Loading Load Cap
Parallel
20 pF
Drive
(max.)
0.1 mW
.
Shunt Cap
(max.)
5 pF
Motional
(max.)
0.016 pF
Tolerance
(max.)
35 ppm
Stability
(max.)
30 ppm
Aging
(max.)
5 ppm
The CY28446 requires a Parallel Resonance Crystal. Substi-
tuting a series resonance crystal causes the CY28446 to
operate at the wrong frequency and violate the ppm specifi-
cation. For most applications there is a 300-ppm frequency
shift between series and parallel crystals due to incorrect
loading
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, use the total capac-
itance the crystal sees to calculate the appropriate capacitive
loading (CL).
Figure 1
shows a typical crystal configuration using the two
trim capacitors. It is important that the trim capacitors are in
series with the crystal. It is not true that load capacitors are in
parallel with the crystal and are approximately equal to the
load capacitance of the crystal.
Figure 1. Crystal Capacitive Clarification
Calculating Load Capacitors
In addition to the standard external trim capacitors, consider
the trace capacitance and pin capacitance to calculate the
crystal loading correctly. Again, the capacitance on each side
Page 8 of 19
Rev 1.0, November 20, 2006