欢迎访问ic37.com |
会员登录 免费注册
发布采购

SL15100ZCT-XXX 参数 Datasheet PDF下载

SL15100ZCT-XXX图片预览
型号: SL15100ZCT-XXX
PDF下载: 下载PDF文件 查看货源
内容描述: Prigrammable扩频时钟发生器( SSCG ) [Prigrammable Spread Spectrum Clock Generator (SSCG)]
分类和应用: 晶体时钟发生器外围集成电路光电二极管
文件页数/大小: 16 页 / 192 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号SL15100ZCT-XXX的Datasheet PDF文件第2页浏览型号SL15100ZCT-XXX的Datasheet PDF文件第3页浏览型号SL15100ZCT-XXX的Datasheet PDF文件第4页浏览型号SL15100ZCT-XXX的Datasheet PDF文件第5页浏览型号SL15100ZCT-XXX的Datasheet PDF文件第7页浏览型号SL15100ZCT-XXX的Datasheet PDF文件第8页浏览型号SL15100ZCT-XXX的Datasheet PDF文件第9页浏览型号SL15100ZCT-XXX的Datasheet PDF文件第10页  
SL15100
Cycle-to-Cycle Jitter
(SSCLK – Pin 6)
Cycle-to-Cycle Jitter
(SSCLK – Pin 6)
Power-down Time
Power-up Time
(Crystal or Resonator)
Power-up Time
(Clock)
Output Enable Time
Output Disable Time
Spread Percent Range
Spread Percent Variation
Modulation Frequency
CCJ8
CCJ9
tPD
tPU1
tPU2
tOE
tOD
SPR
SS%
FMOD
CLKIN=SSCLK=66MHz, 2%Spread
REFCLK=On
CLKIN=SSCLK=33MHz, 2%Spread
REFCLK=On
Time from PD# falling edge to Hi-Z at
outputs (Asynchronous)
Time from PD# rising edge to valid
frequency at outputs (Asynchronous)
Time from PD# rising edge to valid
frequency at outputs (Asynchronous)
Time from OE falling edge to Hi-Z at
outputs (Asynchronous)
Time from OE falling edge to Hi-Z at
outputs (Asynchronous)
SSCLK-1/2 Outputs
Variation of programmed Spread %
Programmable, 31.5 kHz standard
-
-
-
-
-
-
-
0.25
-15
30
100
135
150
3.5
2.0
180
180
-
-
31.5
130
180
350
5.0
3.0
350
350
5.0
15
120
ps
ps
ns
ms
ms
ns
ns
%
%
kHz
DC Electrical Characteristics (C-Grade)
Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range 0 to +85 Deg C
Description
Operating Voltage
Input Low Voltage
Input High Voltage
Output High Voltage
Output Low Voltage
Input High Current
Input Low Current
Pull-up/Down Resistors
Operating Supply
Current
Standby Current
Output Leakage Current
Programmable
Input Capacitance at
Pins 2 and 3
Symbol
VDD
VIL
VIH
VOH1
VOL1
IIH
IIL
RPU/D
IDD
ISBC
IOL
CXIN
CXOUT
Condition
VDD+/-10%
CMOS Level, Pins 4 and 8
CMOS Level, Pins 4 and 8
IOH=6mA , Pins 6 and 7
IOL=6mA, Pins 6 and 7
VIN=VDD, Pins 4 and 8
If no pull-up/down resister used
VIN=GND, Pins 4 and 8
If no pull-up/down resister used
VIN=VDD or GND
FIN=30MHz, REFCLK=30MHz
SSCLK=66MHz, PD#/OE=VDD
SSON#=GND, CL=0
PD#=GND
Pins 6 and 7
Minimum programming value
Maximum programming value
Resolution (programming steps)
Min
2.25
0
0.7V
DD
V
DD
-0.5
-
-
-
90
-
-
-10
-
-
-
Typ
2.5
-
-
-
-
-
-
160
6.8
70
-
8.5
40
0.5
Max
2.75
0.3V
DD
V
DD
-
0.5
10
10
230
8.1
90
10
-
-
-
Unit
V
V
V
V
V
A
A
k
mA
A
A
pF
pF
pF
Rev 1.8, August 10, 2007
Page 6 of 16