W312-02
Pin Definitions (continued)
Pin
Type
Pin Name
Pin No.
Pin Description
PD#
34
I
Power-Down Input: This input will trigger the clock generator into Power Down
mode when it is active.
SDATA
31
30
40
I/O
I
Data pin for SMBus circuitry.
Clock pin for SMBus circuitry.
SCLK
VDD_CPU
P
2.5V Power Connection: Power supply for CPU output buffers. Connect to
2.5V.
VDDQ_AGP
25
P
3.3V Power Connection: Power supply for AGP output buffers. Connect to
3.3V.
VDDQ_PCI
15, 23
5
P
P
3.3V Power Connection: Power supply for PCI output buffers. Connect to 3.3V.
VDDQ_48MHz
3.3V Power Connection: Power supply for 48 MHz output buffers. Connect to
3.3V.
VDD_REF
1
P
3.3V Power Connection: Power supply for reference output buffers. Connect
to 3.3V.
VDD_Core
33
P
3.3V Power Connection: Power supply for PLL core. Connect to 3.3V.
GND_REF,
GND_48MHz,
GND_PCI,
GND_AGP,
GND_Core,
GND_CPU
2, 8, 29, 32, 37,
43
G
Ground Connections: Connect all ground pins to the common system ground
plane.
Rev 1.0,November 27, 2006
Page 3 of 19