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M25P64 参数 Datasheet PDF下载

M25P64图片预览
型号: M25P64
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位,低电压,串行闪存的50MHz SPI总线接口 [64 Mbit, Low Voltage, Serial Flash Memory With 50MHz SPI Bus Interface]
分类和应用: 闪存
文件页数/大小: 38 页 / 521 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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M25P64
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure
sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set pri-
or to every Page Program (PP), Sector Erase
(SE), Bulk Erase (BE) and Write Status Register
(WRSR) instruction.
The Write Enable (WREN) instruction is entered
by driving Chip Select (S) Low, sending the in-
struction code, and then driving Chip Select (S)
High.
Figure 9. Write Enable (WREN) Instruction Sequence
S
0
C
Instruction
D
High Impedance
Q
AI02281E
1
2
3
4
5
6
7
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure
resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by
driving Chip Select (S) Low, sending the instruc-
tion code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under
the following conditions:
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction
completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Figure 10. Write Disable (WRDI) Instruction Sequence
S
0
C
Instruction
D
High Impedance
Q
AI03750D
1
2
3
4
5
6
7
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