M50FLW080A, M50FLW080B
STATUS REGISTER
The Status Register provides information on the
current or previous Program or Erase operation.
The bits in the Status Register convey specific in-
formation about the progress of the operation.
To read the Status Register, the Read Status Reg-
ister command can be issued. The Status Register
is automatically read after Program, Erase and
Program/Erase Resume commands are issued.
The Status Register can be read from any ad-
dress.
The text descriptions, below, should be read in
conjunction with Table 14., where the meanings of
the Status Register bits are summarized.
once the Program/Erase Controller Status bit is ‘1’
(Program/Erase Controller inactive).
When the Erase Status bit is ‘0’, the memory has
successfully verified that the Sector/Block has
been erased correctly. When the Erase Status bit
is ‘1’, the Program/Erase Controller has applied
the maximum number of pulses to the Sector/
Block and still failed to verify that the Sector/Block
has been erased correctly.
Once the Erase Status bit is set to ‘1’, it can only
be reset to ‘0’ by a Clear Status Register com-
mand, or by a hardware reset. If it is set to ‘1’, it
should be reset before a new Program or Erase
command is issued, otherwise the new command
will appear to have failed, too.
Program Status (Bit SR4). This bit indicates if a
problem has occurred during the programming of
a byte. The Program Status bit should be read
once the Program/Erase Controller Status bit is ‘1’
(Program/Erase Controller inactive).
When the Program Status bit is ‘0’, the memory
has successfully verified that the byte has been
programmed correctly. When the Program Status
bit is ‘1’, the Program/Erase Controller has applied
the maximum number of pulses to the byte and still
failed to verify that the byte has been programmed
correctly.
Program/Erase Controller Status (Bit SR7).
This bit indicates whether the Program/Erase Con-
troller is active or inactive. When the Program/
Erase Controller Status bit is ‘0’, the Program/
Erase Controller is active; when the bit is ‘1’, the
Program/Erase Controller is inactive.
The Program/Erase Controller Status is ‘0’ imme-
diately after a Program/Erase Suspend command
is issued, until the Program/Erase Controller paus-
es. After the Program/Erase Controller pauses,
the bit is ‘1’.
The end of a Program and Erase operation can be
found by polling the Program/Erase Controller
Status bit can be polled. The other bits in the Sta-
tus Register should not be tested until the Pro-
gram/Erase Controller has completed the
operation (and the Program/Erase Controller Sta-
tus bit is ‘1’).
After the Program/Erase Controller has completed
its operation, the Erase Status, Program Status,
VPP Status and Block/Sector Protection Status
bits should be tested for errors.
Erase Suspend Status (Bit SR6). This bit indi-
cates that an Erase operation has been suspend-
ed, and that it is waiting to be resumed. The Erase
Suspend Status should only be considered valid
when the Program/Erase Controller Status bit is ‘1’
(Program/Erase Controller inactive). After a Pro-
gram/Erase Suspend command is issued, the
memory may still complete the operation rather
than entering the Suspend mode.
When the Erase Suspend Status bit is ‘0’, the Pro-
gram/Erase Controller is active or has completed
its operation. When the bit is ‘1’, a Program/Erase
Suspend command has been issued and the
memory is waiting for a Program/Erase Resume
command.
Once the Program Status bit is set to ‘1’, it can only
be reset to ‘0’ by a Clear Status Register com-
mand, or by a hardware reset. If it is set to ‘1’, it
should be reset before a new Program or Erase
command is issued, otherwise the new command
will appear to have failed, too.
VPP Status (Bit SR3). This bit indicates whether
an invalid voltage was detected on the VPP pin at
the beginning of a Program or Erase operation.
The VPP pin is only sampled at the beginning of
the operation. Indeterminate results can occur if
VPP becomes invalid during a Program or Erase
operation.
Once the VPP Status bit set to ‘1’, it can only be re-
set to ‘0’ by a Clear Status Register command, or
by a hardware reset. If it is set to ‘1’, it should be
reset before a new Program or Erase command is
issued, otherwise the new command will appear to
have failed, too.
Program Suspend Status (Bit SR2). This bit in-
dicates that a Program operation has been sus-
pended, and that it is waiting to be resumed. The
Program Suspend Status should only be consid-
ered valid when the Program/Erase Controller Sta-
tus bit is ‘1’ (Program/Erase Controller inactive).
After a Program/Erase Suspend command is is-
sued, the memory may still complete the operation
instead of entering the Suspend mode.
When a Program/Erase Resume command is is-
sued, the Erase Suspend Status bit returns to ‘0’.
Erase Status (Bit SR5). This bit indicates if a
problem has occurred during the erasing of a Sec-
tor or Block. The Erase Status bit should be read
22/53
STMICROELECTRONICS [ ST ]
