Description
M95M01-R
1
Description
The M95M01-R is an electrically erasable programmable memory (EEPROM) device. It is
accessed by a high speed SPI-compatible bus. The memory array is organized as 131 072
× 8 bit. It can also be seen as 512 pages of 256 bytes each.
The device is accessed by a simple serial interface that is SPI-compatible. The bus signals
are C, D and Q, as shown in
and
The device is selected when Chip Select (S) is taken Low. Communications with the device
can be interrupted using Hold (HOLD).
In order to meet environmental requirements, ST offers the M95M01-R in ECOPACK®
packages. ECOPACK® packages are Lead-free and RoHS compliant.
ECOPACK is an ST trademark. ECOPACK specifications are available at:
www.st.com.
Figure 1.
Logic diagram
VCC
D
C
S
W
HOLD
M95xxx
Q
VSS
AI01789C
Table 1.
Signal names
Signal name
Function
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Write Protect
Hold
Supply voltage
Ground
Input
Input
Output
Input
Input
Input
Direction
C
D
Q
S
W
HOLD
V
CC
V
SS
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